Operating Modes
68HC(9)12DG128 Rev 1.0
64
Operating Modes
MOTOROLA
The MODE register controls the MCU operating mode and various
configuration options. This register is not in the map in peripheral mode
SMODN, MODB, MODA — Mode Select Special, B and A
These bits show the current operating mode and reflect the status of
the BKGD, MODB and MODA input pins at the rising edge of reset.
SMODN is Read anytime. May only be written in special modes
(SMODN = 0). The first write is ignored;
MODB, MODA may be written once in Normal modes (SMODN = 1).
Write anytime in special modes (first write is ignored) – special
peripheral and reserved modes cannot be selected.
ESTR — E Clock Stretch Enable
Determines if the E Clock behaves as a simple free-running clock or
as a bus control signal that is active only for external bus cycles.
ESTR is always one in expanded modes since it is required for
address and data bus de-multiplexing and must follow stretched
cycles.
0 = E never stretches (always free running).
1 = E stretches high during external access cycles and low during
non-visible internal accesses (IVIS = 0).
Normal modes: write once; Special modes: write anytime. Read
anytime.
IVIS — Internal Visibility
This bit determines whether internal ADDR, DATA, R/W and LSTRB
signals can be seen on the external bus during accesses to internal
locations. In Special Narrow Mode if this bit is set and an internal
access occurs the data will appear wide on Ports A and B. This serves
the same function as the EMD bit of the non-multiplexed versions of
the HC12 and allows for emulation. Visibility is not available when the
part is operating in a single-chip mode.
0 = No visibility of internal bus operations on external bus.
1 = Internal bus operations are visible on external bus.
Normal modes: write once; Special modes: write anytime EXCEPT
the first time. Read anytime.
6-modes