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參數(shù)資料
| 型號(hào)： | 71V433S12PF |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 32K x 32 3.3V Synchronous SRAM Flow-Through Outputs |
| 中文描述： | 32K的× 32 3.3同步SRAM的流量通過輸出 |
| 文件頁數(shù)： | 6/19頁 |
| 文件大小： | 261K |
| 代理商： | 71V433S12PF |
6
IDT71V433
32K x 32, 3.3V Synchronous SRAM with Flow-Through Outputs Commercial and Industrial Temperature Ranges
Synchronous Truth Table
(1, 2)
NOTES:
1. L = V
IL
, H = V
IH
, X = Dont Care.
2. ZZ = LOW for this table.
3.
OE
is an asynchronous input.
Operation
Address
Used
CE
CS
0
CS
1
ADSP
ADSC
ADV
GW
BWE
BW
X
OE
(3)
CLK
I/O
Deselected Cycle, Power Down
None
H
X
X
X
L
X
X
X
X
X
↑
Hi-Z
Deselected Cycle, Power Down
None
L
X
H
L
X
X
X
X
X
X
↑
Hi-Z
Deselected Cycle, Power Down
None
L
L
X
L
X
X
X
X
X
X
↑
Hi-Z
Deselected Cycle, Power Down
None
L
X
H
X
L
X
X
X
X
X
↑
Hi-Z
Deselected Cycle, Power Down
None
L
L
X
X
L
X
X
X
X
X
↑
Hi-Z
Read Cycle, Begin Burst
External
L
H
L
L
X
X
X
X
X
L
↑
D
OUT
Read Cycle, Begin Burst
External
L
H
L
L
X
X
X
X
X
H
↑
Hi-Z
Read Cycle, Begin Burst
External
L
H
L
H
L
X
H
H
X
L
↑
D
OUT
Read Cycle, Begin Burst
External
L
H
L
H
L
X
H
L
H
L
↑
D
OUT
Read Cycle, Begin Burst
External
L
H
L
H
L
X
H
L
H
H
↑
Hi-Z
Write Cycle, Begin Burst
External
L
H
L
H
L
X
H
L
L
X
↑
D
IN
Write Cycle, Begin Burst
External
L
H
L
H
L
X
L
X
X
X
↑
D
IN
Read Cycle, Continue Burst
Next
X
X
X
H
H
L
H
H
X
L
↑
D
OUT
Read Cycle, Continue Burst
Next
X
X
X
H
H
L
H
H
X
H
↑
Hi-Z
Read Cycle, Continue Burst
Next
X
X
X
H
H
L
H
X
H
L
↑
D
OUT
Read Cycle, Continue Burst
Next
X
X
X
H
H
L
H
X
H
H
↑
Hi-Z
Read Cycle, Continue Burst
Next
H
X
X
X
H
L
H
H
X
L
↑
D
OUT
Read Cycle, Continue Burst
Next
H
X
X
X
H
L
H
H
X
H
↑
Hi-Z
Read Cycle, Continue Burst
Next
H
X
X
X
H
L
H
X
H
L
↑
D
OUT
Read Cycle, Continue Burst
Next
H
X
X
X
H
L
H
X
H
H
↑
Hi-Z
Write Cycle, Continue Burst
Next
X
X
X
H
H
L
H
L
L
X
↑
D
IN
Write Cycle, Continue Burst
Next
X
X
X
H
H
L
L
X
X
X
↑
D
IN
Write Cycle, Continue Burst
Next
H
X
X
X
H
L
H
L
L
X
↑
D
IN
Write Cycle, Continue Burst
Next
H
X
X
X
H
L
L
X
X
X
↑
D
IN
Read Cycle, Suspend Burst
Current
X
X
X
H
H
H
H
H
X
L
↑
D
OUT
Read Cycle, Suspend Burst
Current
X
X
X
H
H
H
H
H
X
H
↑
Hi-Z
Read Cycle, Suspend Burst
Current
X
X
X
H
H
H
H
X
H
L
↑
D
OUT
Read Cycle, Suspend Burst
Current
X
X
X
H
H
H
H
X
H
H
↑
Hi-Z
Read Cycle, Suspend Burst
Current
H
X
X
X
H
H
H
H
X
L
↑
D
OUT
Read Cycle, Suspend Burst
Current
H
X
X
X
H
H
H
H
X
H
↑
Hi-Z
Read Cycle, Suspend Burst
Current
H
X
X
X
H
H
H
X
H
L
↑
D
OUT
Read Cycle, Suspend Burst
Current
H
X
X
X
H
H
H
X
H
H
↑
Hi-Z
Write Cycle, Suspend Burst
Current
X
X
X
H
H
H
H
L
L
X
↑
D
IN
Write Cycle, Suspend Burst
Current
X
X
X
H
H
H
L
X
X
X
↑
D
IN
Write Cycle, Suspend Burst
Current
H
X
X
X
H
H
H
L
L
X
↑
D
IN
Write Cycle, Suspend Burst
Current
H
X
X
X
H
H
L
X
X
X
↑
D
IN
3729 tbl 07
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