參數(shù)資料
型號: 73K302L
廠商: TDK Corporation
英文描述: Single-Chip Modem
中文描述: 單芯片調(diào)制解調(diào)器
文件頁數(shù): 11/29頁
文件大?。?/td> 282K
代理商: 73K302L
73K302L
Bell 212A, 103, 202
Single-Chip Modem
11
CONTROL REGISTER 1
(continued)
D7
D6
D5
D4
D3
D2
D1
D0
CR1
001
TRANSMIT
PATTERN
1
TRANSMIT
PATTERN
0
ENABLE
DETECT
INTER.
BYPASS
SCRAMB/
ADD
PH. EQ.
CLK
CONTROL
RESET
TEST
MODE
1
TEST
MODE
0
BIT NO.
NAME
CONDITION
DESCRIPTION
0
Selects 11.0592 MHz crystal echo output at CLK pin.
D3
CLK Control
1
Selects 16 times the data rate, output at CLK pin in DPSK
modes only.
0
Selects normal operation. DPSK data is passed through
scrambler.
D4*
Bypass
Scrambler/
Add Phase
Equalization
1
Selects Scrambler Bypass. DPSK data is routed around
scrambler in the transmit path. In Bell 202 mode,
additional phase equalization is added to the main
channel filters when D4 is set to 1.
Disables interrupt at
INT
pin.
Enables
INT
output. An interrupt will be generated with a
change in status of DR bits D1-D4. The special tone and
call progress detect interrupts are masked when the TX
enable bit is set. Carrier detect is masked when TX DTMF
is activated. All interrupts will be disabled if the device is
in power down mode.
0
D5
Enable
Detect
1
D7
D6
0
0
Selects normal data transmission as controlled by the
state of the TXD pin.
0
1
Selects an alternating mark/space transmit pattern for
modem testing.
1
0
Selects a constant mark transmit pattern.
D7, D6
Transmit
Pattern
1
1
Selects a constant space transmit pattern.
* D4 should always be set to 1 when receiving 1200 bit/s data and to 0 when transmitting 1200 bit/s data in 202
mode.
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