參數(shù)資料
型號： 73K324BL
廠商： Electronic Theatre Controls, Inc.
英文描述： Single-Chip Modem w/Integrated Hybrid
中文描述： 單芯片調制解調器瓦特/集成混合
文件頁數(shù)： 4/34頁
文件大小： 319K
代理商： 73K324BL
73K324BL
V.22bis/V.22/V.21/V.23 Bell 212A
Single-Chip Modem w/Integrated Hybrid
4
FUNCTIONAL DESCRIPTION
(continued)
The synch/asynch converter also has an extended
Overspeed mode which allows selection of an output
overspeed range of either +1% or +2.3%. In the
extended overspeed mode, stop bits are output at 7/8
rising edge of TXCLK the normal width.
Both the synch/asynch rate converter and the data
descrambler are automatically bypassed in the FSK
modes.
SYNCHRONOUS MODE
Synchronous operation is possible only in the QAM or
DPSK modes. Operation is similar to that of the
asynchronous mode except that data must be
synchronized to a provided clock and no variation in
data transfer rate is allowable. Serial input data
appearing at TXD must be valid on the rising edge of
TXCLK.
TXCLK is an internally derived 1200 or 2400 Hz
signal in internal mode and is connected internally to
the RXCLK pin in slave mode. Receive data at the
RXD pin is clocked out on the falling edge of RXCLK.
The asynch/synch converter is bypassed when
synchronous mode is selected and data is transmitted
at the same rate as it is input.
PARALLEL BUS CONTROL INTERFACE MODE
Eight 8-bit registers are provided for control, option
select, and status monitoring. These registers are
addressed with the AD0, AD1, and AD2 multiplexed
address lines (latched by ALE) and appear to a
control microprocessor as seven consecutive memory
locations. Six control registers are read/write memory.
The detect and ID registers are read only and cannot
be modified except by modem response to monitored
parameters.
SERIAL CONTROL INTERFACE MODE
The serial Command mode allows access to the
73K324BL control and status registers via a serial
control port. In this mode the AD0, AD1, and AD2
lines provide register addresses for data passed
through the AD7 (DATA) pin under control of the
RD
and
WR
lines. A read operation is initiated when the
RD
line is taken low. The next eight cycles of EXCLK
will then transfer out eight bits of the selected
addresss location LSB first. A write takes place by
shifting in eight bits of data LSB first for eight
consectuive cycles of EXCLK.
WR
is then pulsed low
and data transfer into the selected register occurs on
the rising edge of
WR
.
DTMF GENERATOR
The DTMF generator controls the sending of the
sixteen standard DTMF tone pairs. The tone pair sent
is determined by selecting transmit DTMF (bit D4)
and the 4 DTMF bits (D0-D3) of the Tone Register.
Transmission of DTMF tones from TXA is gated by
the transmit enable bit of CR0 (bit D1) as with all
other analog signals.
相關PDF資料
PDF描述
73K324BL-IGT CONN, SHROUDED HDR, 34PIN, MALE, 0.100
73K324BL-IH Four Wall Header; No. of Contacts:34; Pitch Spacing:0.1"; No. of Rows:2; Gender:Header; Body Material:Glass-filled Polyester; Contact Plating:Nickel; Leaded Process Compatible:No; Mounting Type:Through Hole RoHS Compliant: No
73K324L EMBASE
73K324L-28IH COSSE
73K324L-IGT CCITT V.22bis, V.22, V.21, V.23, Bell 212A Single-Chip Modem
相關代理商/技術參數(shù)
參數(shù)描述
73K324BL-IGT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip Modem w/Integrated Hybrid
73K324BL-IH 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip Modem w/Integrated Hybrid
73K324BL-IH/F 功能描述:電信集成電路 Single Chip Modem w/Integrated Hybrid RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
73K324BL-IHR/F 功能描述:電信集成電路 Single Chip Modem w/Integrated Hybrid RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
73K324L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CCITT V.22bis, V.22, V.21, V.23, Bell 212A Single-Chip Modem
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