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參數(shù)資料
| 型號： | 73K324BL |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single-Chip Modem w/Integrated Hybrid |
| 中文描述： | 單芯片調(diào)制解調(diào)器瓦特/集成混合 |
| 文件頁數(shù)： | 6/34頁 |
| 文件大小： | 319K |
| 代理商： | 73K324BL |
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73K324BL
V.22bis/V.22/V.21/V.23 Bell 212A
Single-Chip Modem w/Integrated Hybrid
6
PARALLEL MICROPROCESSOR INTERFACE
(continued)
NAME
WR
PIN
TYPE
DESCRIPTION
14
I
WRITE: A low on this informs the 73K324BL that data is
available on AD0-AD7 for writing into an internal register.
Data is latched on the rising edge of
WR
. No data is written
unless both
WR
and the latched
CS
are low.
SERIAL MICROPROCESSOR CONTROL INTERFACE MODE
NAME
PIN
TYPE
DESCRIPTION
AD0-AD2
5-7
I
REGISTER ADDRESS SELECTION: These lines carry
register addresses and should be valid during any read or
write operation.
DATA (AD7)
12
I/O
SERIAL CONTROL DATA: Data for a read/write operation is
clocked in or out on the falling edge of the EXCLK pin. The
direction of data flow is controlled by the
RD
pin.
RD
low
outputs data.
RD
high inputs data.
RD
15
I
READ: A low on this input informs the 73K324BL that data or
status information is being read by the processor. The falling
edge of the
RD
signal will initiate a read from the addressed
register. The
RD
signal must continue for eight falling edges
of EXCLK in order to read all eight bits of the referenced
register. Read data is provided LSB first. Data will not be
output unless the
RD
signal is active.
WR
14
I
WRITE: A low on this input informs the 73K324BL that data
or status information has been shifted in through the DATA
pin and is available for writing to an internal register. The
normal procedure for a write is to shift in data LSB first on the
DATA pin for eight consecutive falling edges of EXCLK and
then to pulse
WR
low. Data is written on the rising edge of
WR
.
NOTE: The serial control mode is provided by tying ALE high and
CS
low. In this configuration AD7 becomes
DATA and AD0, AD1 and AD2 become the register address.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 73K324BL-IGT | CONN, SHROUDED HDR, 34PIN, MALE, 0.100 |
| 73K324BL-IH | Four Wall Header; No. of Contacts:34; Pitch Spacing:0.1"; No. of Rows:2; Gender:Header; Body Material:Glass-filled Polyester; Contact Plating:Nickel; Leaded Process Compatible:No; Mounting Type:Through Hole RoHS Compliant: No |
| 73K324L | EMBASE |
| 73K324L-28IH | COSSE |
| 73K324L-IGT | CCITT V.22bis, V.22, V.21, V.23, Bell 212A Single-Chip Modem |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 73K324BL-IGT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip Modem w/Integrated Hybrid |
| 73K324BL-IH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip Modem w/Integrated Hybrid |
| 73K324BL-IH/F | 功能描述:電信集成電路 Single Chip Modem w/Integrated Hybrid RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| 73K324BL-IHR/F | 功能描述:電信集成電路 Single Chip Modem w/Integrated Hybrid RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| 73K324L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CCITT V.22bis, V.22, V.21, V.23, Bell 212A Single-Chip Modem |
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