VCC Stable Timer Register (VccTmr): 0xFE04" />
參數(shù)資料
型號: 73S1209F-68IM/F/P
廠商: Maxim Integrated Products
文件頁數(shù): 106/123頁
文件大小: 0K
描述: IC SMART CARD READER PROG 68-QFN
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 260
系列: 73S12xx
核心處理器: 80515
芯體尺寸: 8-位
速度: 24MHz
連通性: I²C,智能卡,UART/USART
外圍設備: LED,POR,WDT
輸入/輸出數(shù): 9
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-VFQFN 裸露焊盤
包裝: 管件
DS_1209F_004
73S1209F Data Sheet
Rev. 1.2
83
VCC Stable Timer Register (VccTmr): 0xFE04
0x0F
A programmable timer is provided to set the time from activation start (setting the VCCSEL.1 and
VCCSEL.0 bits to non-zero) to when VCC_OK is evaluated. VCC_OK must be true at the end of this
timers programmed interval (tto in Figure 15) in order for the activation sequence to continue. If VCC_OK
is not true and the end of the interval (tto), the Card Event interrupt will be set, and a deactivation
sequence shall begin including clearing of the VCCSEL bits.
Table 77: The VccTmr Register
MSB
LSB
OFFTMR.3 OFFTMR.2 OFFTMR.1 OFFTMR.0 VCCTMR.3 VCCTMR.2 VCCTMR.1 VCCTMR.0
Bit
Symbol
Function
VccTmr.7
OFFTMR.3
VCC Off Timer – The bits set the delay (in number of ETUs) for
deactivation after the VCCSEL.1 and VCC SEL.0 have been set to 0. The
time value is a count of the 32768Hz clock and is given by tto =
OFFTMR(7:4) * 30.5
μs. This delay does not affect emergency
deactivations due to VDD Fault or card events. A value of 0000 results in
no additional delay.
VccTmr.6
OFFTMR.2
VccTmr.5
OFFTMR.1
VccTmr.4
OFFTMR.0
VccTmr.3
VCCTMR.3
VCC Timer – VCCOK must be true at the time set by the value in these
bits in order for the activation sequence to continue. If not, the VCCSEL
bits will be cleared. The time value is a count of the 32768Hz clock and is
given by tto = VCCTMR(3:0) * 30.5
μs. A value of 0000 results in no
timeout, not zero time, and activation requires that RDYST is set and RDY
goes high.
VccTmr.2
VCCTMR.2
VccTmr.1
VCCTMR.1
VccTmr.0
VCCTMR.0
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