參數(shù)資料
型號： 73S1209F-68IM/F/P
廠商： Maxim Integrated Products
文件頁數(shù)： 123/123頁
文件大小： 0K
描述： IC SMART CARD READER PROG 68-QFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 260
系列： 73S12xx
核心處理器： 80515
芯體尺寸： 8-位
速度： 24MHz
連通性： I²C，智能卡，UART/USART
外圍設(shè)備： LED，POR，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 68-VFQFN 裸露焊盤
包裝： 管件
DS_1209F_004
73S1209F Data Sheet
Rev. 1.2
99
Block Wait Time Registers (BWTB0): 0xFE1B
0x00, (BWTB1): 0xFE1A
0x00, (BWTB2):
0xFE19
0x00, (BWTB3): 0xFE18
0x00
Table 98: The BWTB0 Register
MSB
LSB
BWT.7
BWT.6
BWT.5
BWT.4
BWT.3
BWT.1
BWT.2
BWT.0
Table 99: The BWTB1 Register
MSB
LSB
BWT.15
BWT.14
BWT.13
BWT.12
BWT.11
BWT.10
BWT.9
BWT.8
Table 100: The BWTB2 Register
MSB
LSB
BWT.23
BWT.22
BWT.21
BWT.20
BWT.19
BWT.18
BWT.17
BWT.16
Table 101: The BWTB3 Register
MSB
LSB
–
BWT.27
BWT.26
BWT.25
BWT.24
These registers (BWTB0, BWTB1, BWTB2, BWTB3) are used to set the Block Waiting Time(27:0)
(BWT). All of these parameters define the maximum time the 73S1209F will have to wait for a character
from the smart card. These registers serve a dual purpose. When T=1, these registers are used to set
up the block wait time. The block wait time defines the time in ETUs between the beginning of the last
character sent to smart card and the start bit of the first character received from smart card. It can be
used to detect an unresponsive card and should be loaded by firmware prior to writing the last TX byte.
When T = 0, these registers are used to set up the work wait time. The work wait time is defined as the
time between the leading edge of two consecutive characters being sent to or from the card. If a timeout
occurs, an interrupt is generated to the firmware. The firmware can then take appropriate action. A Wait
Time Extension (WTX) is supported with the 28-bit BWT.
Character Wait Time Registers (CWTB0): 0xFE1D
0x00, (CWTB1): 0xFE1C
0x00
Table 102: The CWTB0 Register
MSB
LSB
CWT.7
CWT.6
CWT.5
CWT.4
CWT.3
CWT.1
CWT.2
CWT.0
Table 103: The CWTB1 Register
MSB
LSB
CWT.15
CWT.14
CWT.13
CWT.12
CWT.11
CWT.10
CWT.9
CWT.8
These registers (CWTB0, CWTB1) are used to hold the Character Wait Time(15:0) (CWT) or Initial Waiting
Time(15:0) (IWT) depending on the situation. Both the IWT and the CWT measure the time in ETUs
between the leading edge of the start of the current character received from the smart card and the leading
edge of the start of the next character received from the smart card. The only difference is the mode in
which the card is operating. When T=1 these registers are used to configure the CWT and these registers
configure the IWT when the ATR is being received. These registers should be loaded prior to receiving
characters from the smart card. Firmware must manage which time is stored in the register. If a timeout
occurs, an interrupt is generated to the firmware. The firmware can then take appropriate action.
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