參數(shù)資料
型號(hào): 73S8023C-IMR/F
廠商: Maxim Integrated Products
文件頁數(shù): 15/27頁
文件大?。?/td> 0K
描述: IC SMART CARD INTERFACE 32-QFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
控制器類型: 智能卡接口
電源電壓: 2.7 V ~ 3.6 V
電流 - 電源: 4.9mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN(5x5)
包裝: 帶卷 (TR)
73S8023C Data Sheet
DS_8023C_019
22
Rev. 1.5
Symbol
Parameter
Condition
Min
Typ
Max
Unit
Reset and Clock for card interface, RST, CLK
V
Output level, high
OH
IOH
0.9 V
= -200
A
CC
V
CC
V
Output level, low
OL
IOL
0
= 200
A
0.2
V
Output voltage when outside
of a session
INACT
IOL = 0
0.1
V
IOL = 1 mA
0.3
V
I
Output current limit, RST
RST_LIM
30
mA
I
Output current limit, CLK
CLK_LIM
70
mA
tR, t
Output rise time, fall time
F
CL = 35 pF for
CLK, 10% to 90%
8
ns
CL = 200 pF for
RST, 10% to 90%
100
ns
Td
Delay time STROBE to CLK,
RSTIN to RST
CLKSEL = 1, Cap.
load on CLK and
RST is minimal,
else rise, fall times
are a factor
20
ns
δ
Duty cycle for CLK
CL = 35 pF,
48% <
δ
IN
45
< 52%
55
%
12.5 Digital Signals
Symbol
Parameter
Condition
Min
Typ
Max
Unit
Digital I/O Except for OSC I/O
VIL
Input Low Voltage
-0.3
0.8
V
VIH
Input High Voltage
1.8
VDD + 0.3
V
VOL
Output Low Voltage
IOL = 2 mA
0.45
V
VOH
Output High Voltage
IOH = -1 mA
VDD - 0.45
V
ROUT
Pull-up resistor,
OFF
20
k
tSL
Time from CS going high to
interface active
50
ns
tDZ
Time from CS going low to
interface inactive, Hi-Z
50
ns
tIS
Set-up time, control signals
to CS rising edge
50
ns
tSI
Hold time, control signals
from CS rising edge
50
ns
tID
Set-up time, control signals
to CS fall
50
ns
tDI
Hold time, control signals
from CS fall
50
ns
|IIL1|
Input Leakage Current
GND < VIN < VDD
-5
5
μA
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