- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369283 > 74ABT162823ADLRG4 (Texas Instruments, Inc.) 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS PDF資料下載
參數(shù)資料
| 型號(hào)： | 74ABT162823ADLRG4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 18位總線接口倒裝3觸發(fā)器態(tài)輸出 |
| 文件頁(yè)數(shù)： | 2/10頁(yè) |
| 文件大?。?/td> | 186K |
| 代理商： | 74ABT162823ADLRG4 |
SCBS666B JULY 1996 REVISED JUNE 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
A buffered output-enable (OE) input places the nine outputs in either a normal logic state (high or low level) or
a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components. OE does not affect the internal operation of the flip-flops. Old data can be
retained or new data can be entered while the outputs are in the high-impedance state.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 25-
series resistors to
reduce overshoot and undershoot.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
To ensure the high-impedance state during power up or power down, OE shall be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each 9-bit flip-flop)
INPUTS
OUTPUT
Q
OE
CLR
CLKEN
CLK
D
L
L
X
X
↑
↑
L
X
L
L
H
L
H
H
L
H
L
L
L
L
H
L
X
Q0
Q0
Z
L
H
H
X
X
H
X
X
X
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ABT16853DGGRE4 | DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS |
| 74ABT3284 | 18-Bit Synchronous Datapath Multiplexer |
| 74ABT3284VJG | 18-Bit Synchronous Datapath Multiplexer |
| 74AC00 | QUAD 2-INPUT NAND GATE |
| 74AC00B | QUAD 2-INPUT NAND GATE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ABT162825DLRG4 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 18-Bit Buffer/Driver With 3-State Outputs RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74ABT162827A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit buffer/line driver, non-inverting,with 30ohm termination resistors (3-State) |
| 74ABT162827ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit buffer/line driver, non-inverting,with 30ohm termination resistors (3-State) |
| 74ABT162827ADGGRE4 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 20-Bit Buffer/Driver With 3-State Outputs RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74ABT162827ADGGRG4 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 20B Buffers/Drivers RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。