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參數(shù)資料
| 型號： | 74ALS574 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 八路D型沿觸發(fā)器與觸發(fā)器3態(tài)輸出 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 129K |
| 代理商： | 74ALS574 |
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
Copyright
1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3-State Buffer-Type Noninverting Outputs
Drive Bus Lines Directly
Bus-Structured Pinout
Buffered Control Inputs
SN74ALS575A and
′
AS575 Have
Synchronous Clear
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N, NT)
and Ceramic (J, JT) 300-mil DIPs, and
Ceramic Flat (W) Packages
description
These octal D-type edge-triggered flip-flops
feature 3-state outputs designed specifically for
bus driving. They are particularly suitable for
implementing
buffer
bidirectional bus drivers, and working registers.
registers,
I/O
ports,
The eight flip-flops enter data on the low-to-high
transition of the clock (CLK) input. The
SN74ALS575A, SN54AS575, and SN74AS575
may be synchronously cleared by taking the clear
(CLR) input low.
The output-enable (OE) input does not affect
internal operations of the flip-flops. Old data can
be retained or new data can be entered while the
outputs are in the high-impedance state.
The
SN54AS575 are characterized for operation over
the full military temperature range of –55
°
C to
125
°
C. The SN74ALS574B, SN74ALS575A,
SN74AS574, and SN74AS575 are characterized
for operation from 0
°
C to 70
°
C.
SN54ALS574B,
SN54AS574,
and
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
SN54ALS574B, SN54AS574 . . . J OR W PACKAGE
SN74ALS574B, SN74AS574 . . . DW OR N PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 111213
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
2
1
O
8
7
1
8
G
C
V
SN54ALS574B, SN54AS574 . . . FK PACKAGE
(TOP VIEW)
SN54AS575 . . . JT OR W PACKAGE
SN74ALS575A, SN74AS575 . . . DW OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLR
OE
1D
2D
3D
4D
5D
6D
7D
8D
NC
GND
VCC
NC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
NC
SN54AS575 . . . FK PACKAGE
(TOP VIEW)
3 2 1
1314
5
6
7
8
9
10
11
2Q
3Q
4Q
NC
5Q
6Q
7Q
2D
3D
4D
NC
5D
6D
7D
4
15161718
N
G
N
N
C
8
1
O
C
N
28 27 2625
24
23
22
21
20
19
12
8
N
1
V
NC – No internal connection
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALS574A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Latch flip-flop |
| 74ALS574AD | 制造商:SIG 功能描述:74ALS574 SIG |
| 74ALS574ADB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Latch flip-flop |
| 74ALS574AN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Latch flip-flop |
| 74ALS574NTI88 | 制造商:TI 功能描述:74ALS574N |
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