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參數(shù)資料
| 型號： | 74ALVCH16269ZQLR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS |
| 中文描述： | 12位到24位注冊巴士換熱具有三態(tài)輸出 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大小： | 438K |
| 代理商： | 74ALVCH16269ZQLR |
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as
possible, and OE should be tied to V
through a pullup resistor; the minimum value of the resistor is determined
by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the
outputs cannot be determined before the arrival of the first clock pulse.
GQL OR ZQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
2
1
3
4
6
5
K
SN74ALVCH16269
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES019N–JULY 1995–REVISED JULY 2004
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
TERMINAL ASSIGNMENTS
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
K
2B3
2B1
A2
A4
A6
A7
A9
A11
1B1
1B3
OEB1
2B2
A1
A3
A5
A8
A10
A12
1B2
NC
OEA
GND
V
CC
GND
OEB2
GND
V
CC
GND
CLKENA2
2B5
2B7
2B9
2B11
1B11
1B9
1B7
1B5
CLKENA1
2B4
2B6
2B8
2B10
2B12
1B12
1B10
1B8
1B6
1B4
GND
V
CC
GND
SEL
GND
V
CC
GND
CLK
2
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