參數(shù)資料
型號: 74ALVCH16973DLRG4
廠商: Texas Instruments, Inc.
英文描述: 8-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH WITH FOUR INDEPENDENT BUFFERS
中文描述: 8位總線收發(fā)器和透明D類具有四個獨立的緩沖器鎖存
文件頁數(shù): 7/13頁
文件大?。?/td> 178K
代理商: 74ALVCH16973DLRG4
www.ti.com
OPERATING CHARACTERISTICS
(1)
T
A
= 25
°
C
SN74ALVCH16973
8-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH
WITH FOUR INDEPENDENT BUFFERS
SCES435B–APRIL 2003–REVISED SEPTEMBER 2004
V
CC
= 1.8 V
TYP
V
CC
= 2.5 V
TYP
V
CC
= 3.3 V
TYP
PARAMETER
TEST CONDITIONS
UNIT
One f
A
= 10 MHz,
One f
= 10 MHz,
TOE = GND,
LOE = V
,
DIR = GND,
C
L
= 0 pF
One f
A
= 10 MHz,
One f
= 10 MHz,
TOE = GND,
LOE = V
,
DIR = GND,
C
L
= 0 pF
One f
A
= 10 MHz,
One f
LE
= 20 MHz,
One f
= 10 MHz,
TOE = V
,
LOE = GND,
C
L
= 0 pF
One f
D
= 10 MHz,
One f
= 10 MHz,
TOE = V
CC
,
LOE = V
CC
,
C
L
= 0 pF
One f
A
= 10 MHz,
One f
= 20 MHz,
f
not switching,
TOE = V
CC
,
LOE = V
CC
,
C
L
= 0 pF
f
not switching,
One f
= 20 MHz,
f
not switching,
TOE = V
CC
,
LOE = V
CC
,
C
L
= 0 pF
A outputs enabled,
Q outputs disabled,
One A output switching
12
14
19
B outputs enabled,
Q outputs disabled,
One B output switching
12
14
21
C
pd(2)
(each output)
Power dissipation
capacitance
pF
Q outputs enabled,
A and B I/Os isolated,
One Q output switching
11
13
19
One Y output switching,
A and B I/Os isolated,
Q outputs disabled
7
8
12
A and B I/Os isolated,
Q outputs disabled,
One LE and one A data
input switching
Power dissipation
capacitance
C
pd (Z)
4
5
11
pF
A and B I/Os isolated,
Q outputs disabled,
One LE input switching
C
pd(3)
(each LE)
Power dissipation
capacitance
6
7
9
pF
(1)
(2)
Total device C
for multiple (m) outputs switching and (n) LE inputs switching = [m * C
(each output)] + [n * C
(each LE)].
C
(each output) is the C
pd
for each data bit (input and output circuitry) when it operates at 10 MHz (Note: the LE is operating at
20 MHz in this test, but its I
component has been subtracted).
C
pd
(each LE) is the C
pd
for the clock circuitry only when it operates at 20 MHz.
(3)
7
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