參數(shù)資料
型號(hào)： 74ALVCHR16269AVRE4
廠商： Texas Instruments, Inc.
英文描述： 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS
中文描述： 12位到24位注冊(cè)巴士換熱具有三態(tài)輸出
文件頁(yè)數(shù)： 2/12頁(yè)
文件大?。?/td> 168K
代理商： 74ALVCHR16269AVRE4
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as
possible, and OE should be tied to V
CC
through a pullup resistor; the minimum value of the resistor is determined
by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the
outputs cannot be determined prior to the arrival of the first clock pulse.
FUNCTION TABLES
SN74ALVCHR16269A
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES050O–AUGUST 1995–REVISED SEPTEMBER 2004
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
All outputs are designed to sink up to 12 mA and include equivalent 26-
resistors to reduce overshoot and
undershoot.
OUTPUT ENABLE
INPUTS
OEA
H
H
L
L
OUTPUTS
CLK
↑
↑
↑
↑
OEB
H
L
H
L
A
Z
Z
1B, 2B
Z
Active
Z
Active
Active
Active
A-TO-B STORAGE (OEB = L)
INPUTS
CLKENA2
H
H
L
L
L
L
H
OUTPUTS
1B
L
H
L
H
1B
0(1)
1B
0(1)
1B
0(1)
CLKENA1
L
L
L
L
H
H
H
CLK
↑
↑
↑
↑
↑
↑
X
A
L
H
L
H
L
H
X
2B
2B
0(1)
2B
0(1)
L
H
L
H
2B
0(1)
(1)
Output level before the indicated steady-state input conditions were
established
B-TO-A STORAGE (OEA = L)
INPUTS
OUTPUT
A
CLK
X
X
↑
↑
↑
↑
SEL
H
L
H
H
L
L
1B
X
X
L
H
X
X
2B
X
X
X
X
L
H
A
0(1)
A
0(1)
L
H
L
H
(1)
Output level before the indicated steady-state input conditions were
established
2
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