參數(shù)資料
型號: 74F175SJX
元件分類: 通用總線功能
英文描述: Quad D-Type Flip-Flop
中文描述: 四D型觸發(fā)器
文件頁數(shù): 1/7頁
文件大?。?/td> 77K
代理商: 74F175SJX
2000 Fairchild Semiconductor Corporation
DS009489
www.fairchildsemi.com
April 1988
Revised September 2000
7
74F174
Hex D-Type Flip-Flop with Master Reset
General Description
The 74F174 is a high-speed hex D-type flip-flop. The
device is used primarily as a 6-bit edge-triggered storage
register. The information on the D inputs is transferred to
storage during the LOW-to-HIGH clock transition. The
device has a Master Reset to simultaneously clear all
flip-flops.
Features
I
Edge-triggered D-type inputs
I
Buffered positive edge-triggered clock
I
Asynchronous common reset
I
Guaranteed 4000V minimum ESD protection
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number
74F174SC
74F174SJ
74F174PC
Package Number
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
相關(guān)PDF資料
PDF描述
74F174 Hex D flip-flops
74F174 Hex D Flip-Flop with Master Reset
74F174PC Hex D Flip-Flop with Master Reset
74F174SC Hex D Flip-Flop with Master Reset
74F174SJ Hex D Flip-Flop with Master Reset
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