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參數(shù)資料
| 型號： | 74F552 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal registered transceiver with parity and flags (3-State)(帶奇偶和標志位的八通道寄存收發(fā)器（三態(tài)）) |
| 中文描述： | 八路注冊平等和旗幟（3態(tài)）（帶奇偶和標志位的八收發(fā)器通道寄存收發(fā)器（三態(tài)）） |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 115K |
| 代理商： | 74F552 |
Philips Semiconductors
Product specification
74F552
Octal registered transceiver with parity and flags (3-State)
2
1991 Jan 02
853–1098 01347
FEATURES
8-bit bidirectional I/O port with handshake
Register status flag flip-flops
Separate clock enable and output enable
Parity generation and parity check
B outputs and parity output sink 64mA
DESCRIPTION
The 74F522 Octal Registered Transceiver contains two 8-bit
registers for temporary storage of data flowing in either direction.
Each register has its own clock (CPR, CPS) and Clock Enable
(CER, CES) inputs, as well as a flag flip-flop that is set automatically
as the register is loaded. The flag output will be reset when the
Output Enable returns to High after reading the output port. Each
register has a separate Output Enable (OEAS, OEBR) for its 3-State
buffer. The separate Clocks, Flags and Enables provide
considerable flexibility as I/O ports for demand-response data
transfer. When data is transferred from the A port to the B port, a
parity bit is generated. On the other hand, when data is transferred
from the B port to the A port, the parity of input data on B0–B7 is
checked.
TYPE
TYPICAL f
MAX
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F552
85MHz
120mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
PKG DWG #
28-Pin Plastic DIP
(600mil)
N74F552N
SOT117-2
28-Pin Plastic SOL
N74F552D
SOT136-1
LOGIC SYMBOL
26
27
28
V
= Pin 8
GND = Pin 22
18
17
16
15
14
13
12
21
20
SF01041
CPS
OEAS
B0
B1
B4
B5
B6
B7
CES
A0
A1
A4
A5
A6
A7
B2
B3
A3
A2
1
2
3
4
25
11
6
7
CER
CPR
19
5
OEBR
24
9
FR
23
10
FS
PARITY
ERROR
PIN CONFIGURATION
SF01039
1
2
3
4
5
6
7
8
9
10
11
12
17
18
19
20
21
22
23
24
25
26
27
28
B4
B5
B6
OEBR
CPR
CER
ERROR
FS
A7
B3
B2
B1
B0
FR
PARITY
GND
CPS
CES
OEAS
A0
A1
A6
13
16 A2
A5
14
15 A3
A4
B7
V
CC
LOGIC SYMBOL (IEEE/IEC)
25
26
27
28
1
2
3
4
18
17
16
15
14
13
12
11
1C2
EN1’
EN6
6C4
EN3
EN6
SF01040
1,2,6
3,4,6
20
6
7
5
21
19
5,6
5,6
6
6,7
5
23
9
10
14
XCVR
Z7
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F552D | 制造商:NXP Semiconductors 功能描述: |
| 74F552DC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single 8-bit Bus Transceiver |
| 74F552QC | 功能描述:總線收發(fā)器 Oct Registered Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F552QCX | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Single 8-bit Bus Transceiver |
| 74F552SC | 功能描述:總線收發(fā)器 Oct Registered Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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