參數(shù)資料
型號(hào): 74FCT162652CTPVCT
廠商: Texas Instruments, Inc.
元件分類: 通用總線功能
英文描述: 16-Bit Registered Transceivers
中文描述: 16位注冊(cè)收發(fā)器
文件頁(yè)數(shù): 1/10頁(yè)
文件大?。?/td> 77K
代理商: 74FCT162652CTPVCT
16-Bit Registered Transceivers
CY74FCT16652T
CY74FCT162652T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
SCCS061 - July 1994 - Revised March 2000
Copyright
2000, Texas Instruments Incorporated
1CY74FCT162652T
Features
FCT-E speed at 3.8 ns
Power-off disable outputs permits live insertion
Edge-rate control circuitry for significantly improved
noise characteristics
Typical output skew < 250 ps
ESD > 2000V
TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
Industrial temperature range of
40C to +85C
V
CC
= 5V
±
10%
CY74FCT16652T Features:
64 mA sink current, 32 mA source current
Typical V
OLP
(ground bounce) <1.0V at V
CC
= 5V,
T
A
= 25C
CY74FCT162652T Features:
Balanced 24 mA output drivers
Reduced system switching noise
Typical V
OLP
(ground bounce) <0.6V at V
CC
= 5V,
T
A
= 25C
Functional Description
These 16-bit, high-speed, low-power, registered transceivers
that are organized as two independent 8-bit bus transceivers
with three-state D-type registers and control circuitry arranged
for multiplexed transmission of data directly from the input bus
orfromtheinternalstorageregisters.OEABandOEBAcontrol
pins are provided to control the transceiver functions. SAB and
SBA control pins are provided to select either real-time or
stored data transfer.
Data on the A or B data bus, or both, can be stored in the
internal D flip-flops by LOW-to-HIGH transitions at the
appropriate clock pins (CLKAB or CLKBA), regardless of the
select or enable control pins. When SAB and SBA are in the
real-time transfer mode, it is also possible to store data without
using the internal D-type flip-flops by simultaneously enabling
OEAB and OEBA. In this configuration, each output reinforces
its input. Thus, when all other data sources to the two sets of
bus lines are at high impedance, each set of bus lines will
remain at its last state. The output buffers are designed with a
power-off disable feature that allows live insertion of boards.
The
CY74FCT16652T
is
high-capacitance loads and low-impedance backplanes.
The CY74FCT162652T has 24-mA balanced output drivers
with current-limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162652T is ideal for driving transmission lines.
ideally
suited
for
driving
TO 7 OTHER CHANNELS
1
OEAB
C
D
1
A
1
1
OEBA
1
CLKBA
1
CLKAB
1
SAB
1
SBA
B REG
C
D
A REG
1
B
1
FCT16652-1
2
OEAB
2
SAB
2
OEBA
2
CLKBA
2
CLKAB
2
SBA
2
B
1
2
A
1
C
D
B REG
C
D
A REG
TO 7 OTHER CHANNELS
FCT16652-2
Logic Block Diagrams
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