參數(shù)資料
型號(hào): 74FCT162827CTPVCT
廠商: Texas Instruments, Inc.
英文描述: 20-Bit Buffers/Line Drivers
中文描述: 20位緩沖器/線路驅(qū)動(dòng)器
文件頁(yè)數(shù): 4/7頁(yè)
文件大?。?/td> 62K
代理商: 74FCT162827CTPVCT
CY74FCT16827T
CY74FCT162827T
4
Switching Characteristics
Over the Operating Range
[12]
CY74FCT16827AT
CY74FCT162827AT
Min.
1.5
CY74FCT162827BT
Min.
1.5
Parameter
t
PLH
t
PHL
Description
Propagation Delay
A to Y
Condition
[13]
C
L
=50 pF
R
L
=500
C
L
=300 pF
R
L
=500
C
L
=50 pF
R
L
=500
C
L
=300 pF
R
L
=500
C
L
=5 pF
R
L
=500
C
L
=50 pF
R
L
=500
Max.
8.0
Max.
5.0
Unit
ns
Fig. No.
[13]
1, 3
1.5
15.0
1.5
13.0
t
PZH
t
PZL
Output Enable Time
OE to Y
1.5
12.0
1.5
8.0
ns
1, 7, 8
1.5
23.0
1.5
15.0
t
PHZ
t
PLZ
Output Disable Time
OE to Y
1.5
9.0
1.5
6.0
ns
1, 7, 8
1.5
10.0
1.5
7.0
t
SK(O)
Output Skew
[14]
0.5
0.5
ns
CY74FCT16827CT
CY74FCT162827CT
Min.
1.5
CY74FCT16827ET
CY74FCT162827ET
Min.
1.5
Parameter
t
PLH
t
PHL
Description
Propagation Delay
A to Y
Condition
[12]
C
L
=50 pF
R
L
=500
C
L
=300 pF
R
L
=500
C
L
=50 pF
R
L
=500
C
L
=300 pF
R
L
=500
C
L
=5 pF
R
L
=500
C
L
=50 pF
R
L
=500
Max.
4.2
Max.
3.2
Unit
ns
Fig. No.
[13]
1, 3
1.5
10.0
1.5
7.0
t
PZH
t
PZL
Output Enable Time
OE to Y
1.5
5.6
1.5
4.8
ns
1, 7, 8
1.5
14.0
1.5
9.0
t
PHZ
t
PLZ
Output Disable Time
OE to Y
1.5
5.7
1.5
4.0
ns
1, 7, 8
1.5
6.0
1.5
4.0
t
SK(O)
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
14. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Output Skew
[14]
0.5
0.5
ns
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