參數(shù)資料
型號(hào)： 74GTL1655A
廠商： 意法半導(dǎo)體
英文描述： 16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION
中文描述： 16位LVTTL差動(dòng)的GTL /的GTL通用總線收發(fā)器與帶電插入
文件頁(yè)數(shù)： 1/16頁(yè)
文件大?。?/td> 260K
代理商： 74GTL1655A
1/16
October 2004
I
HIGH SPEED GTL/GTL+ UNIVERSAL
TRANSCEIVER:
t
PD
= 4.6 ns (MAX.) A to B at V
CC
= 3V
COMBINES D-TYPE LATCHES AND D-TYPE
FLIP-FLOPS FOR OPERATION IN
TRANSPARENT, LATCHED, OR CLOCKED
MODE
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 3.0V to 3.6V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
=24mA (MIN) at V
CC
= 3V (A PORT)
OUTPUT IMPEDANCE:
I
OL
= 100mA (MIN) at V
CC
= 3V (B PORT)
HIGH-IMPEDANCE STATE DURING POWER
UP AND POWER DOWN up to
V
CC
=BIASV
CC
=1.5V PERMITT LIVE
INSERTION
B-PORT PRECHARGED BY BIASV
CC
REDUCE NOISE ON THE LINE DURING
LIVE INSERTION
EDGE RATE-CONTROL INPUT
CONFIGURES THE B-PORT OUTPUT RISE
AND FALL TIMES
BUS HOLD ON DATA INPUTS ELIMINATES
THE NEED FOR EXTERNAL PULL-UP/
PULL-DOWN RESISTORS (A PORT)
DISTRIBUTED V
CC
AND GND PIN
CONFIGURATION MINIMIZES HIGH-SPEED
SWITCHING NOISE IN PARALLEL
COMUNICATIONS
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 1655
I
I
I
I
I
I
I
I
I
I
DESCRIPTION
The 74GTL1655A devices are 16-bit high-drive
(100mA), low-output-impedance universal bus
transceivers designed for backplane applications.
The 74GTL1655A devices provide live-insertion
active signals on the data ports when the devices
are powered off. In addition, a biasing pin
preconditions the GTL/GTL+ port to minimize
disruption to an active backplane.
The edge rate-control (V
ERC
) input is provided so
the rise and fall time of the B outputs can be
configured to optimize for various backplane
loading conditions. Data flow in each direction is
74GTL1655A
16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS
TRANSCEIVERS WITH LIVE INSERTION
PACKAGE
T & R
TSSOP
74GTL1655ATTR
TSSOP
Figure 1: Pin Connection
Rev. 1
ObsoeePoduc(s ObsoeePoduc(s
相關(guān)PDF資料
PDF描述
74GTL1655 16-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION
74GTLP2033DGVRE4 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH
74GTLP22034DGGRE4 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH
74GTLP22034DGVRE4 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH
74H1G66 SINGLE BILATERAL SWITCH
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74GTL1655ATTR 制造商:STMicroelectronics 功能描述:
74GTL1655TTR 功能描述:總線收發(fā)器 16-Bit Bus Transcvr RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74GTL16612DGGRE4 功能描述:轉(zhuǎn)換 - 電壓電平 18B LVTTL-GTL/GTL Univ Bus Trans RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
74GTL16612DGGRG4 功能描述:轉(zhuǎn)換 - 電壓電平 18B LVTTL-to-GTL/GTL Univ Bus Xceivers RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
74GTL16616DGGRE4 功能描述:轉(zhuǎn)換 - 電壓電平 17B LVTTL-GTL/GTL Univ Bus Trans RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*