參數(shù)資料
型號: 74HCT1G32GW,125
廠商: NXP Semiconductors
文件頁數(shù): 8/11頁
文件大?。?/td> 0K
描述: IC 2-INPUT OR GATE SOT353
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 3,000
系列: 74HCT
邏輯類型: 或門
電路數(shù): 1
輸入數(shù): 2
電源電壓: 4.5 V ~ 5.5 V
電流 - 靜態(tài)(最大值): 20µA
輸出電流高,低: 2mA,2mA
邏輯電平 - 低: 0.8V
邏輯電平 - 高: 2V
額定電壓和最大 CL 時(shí)的最大傳播延遲: 10ns @ 4.5V,50pF
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 5-TSSOP
封裝/外殼: 6-TSSOP(5 引線),SC-88A,SOT-353
包裝: 帶卷 (TR)
2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FST3125 Rev. 1.0.3
6
FST3125
4-
B
it
B
u
s
Swit
ch
Physical Dimensions
LAND PATTERN RECOMMENDATION
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AB, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD:
SOIC127P600X145-14M
E) DRAWING CONFORMS TO ASME Y14.5M-1994
F) DRAWING FILE NAME: M14AREV13
PIN ONE
INDICATOR
SEATING PLANE
DETAIL A
SCALE: 20:1
GAGE PLANE
0.25
X 45°
1
0.10
C
B
CA
7
M
14
B
A
8
SEE DETAIL A
5.60
0.65
1.70
1.27
8.75
8.50
7.62
6.00
4.00
3.80
(0.33)
1.27
0.51
0.35
1.75 MAX
1.50
1.25
0.25
0.10
0.25
0.19
(1.04)
0.90
0.50
0.36
R0.10
0.50
0.25
Figure 6. 14-Lead, Small-Outline Integrated Circuit (SOIC) 0.150-inch Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
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