參數(shù)資料
型號: 74LV273N,112
廠商: NXP Semiconductors
文件頁數(shù): 9/12頁
文件大小: 0K
描述: IC OCTAL D F-F POS-EDGE 20-DIP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 720
系列: 74LV
功能: 主復(fù)位
類型: D 型總線
輸出類型: 非反相
元件數(shù): 1
每個元件的位元數(shù): 8
頻率 - 時鐘: 20MHz
延遲時間 - 傳輸: 20ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 12mA,12mA
電源電壓: 1 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 通孔
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
Philips Semiconductors
Product specification
74LV273
Octal D-type flip-flop with reset; positive edge-trigger
1998 May 29
6
DC CHARACTERISTICS FOR THE LV FAMILY (Continued)
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
-40
°C to +85°C
-40
°C to +125°C
UNIT
II
Input leakage
current
VCC = 5.5V; VI = VCC or GND
1.0
A
ICC
Quiescent supply
current; MSI
VCC = 5.5V; VI = VCC or GND; IO = 0
20.0
160
A
ICC
Additional
quiescent supply
current per input
VCC = 2.7V to 3.6V; VI = VCC –0.6V
500
850
A
NOTE:
1. All typical values are measured at Tamb = 25°C.
AC CHARACTERISTICS
GND = 0V; tr = tf = 2.5ns; CL = 50pF; RL = 1K
SYMBOL
PARAMETER
WAVEFORM
CONDITION
LIMITS
–40 to +85
°C
LIMITS
–40 to +125
°C
UNIT
VCC(V)
MIN
TYP1
MAX
MIN
MAX
1.2
75
Propagation delay
2.0
26
32
41
tPHL/tPLH
Propagation delay
CP to Qn
Figure 1
2.7
19
24
30
ns
CP to Qn
3.0 to 3.6
142
19
24
4.5 to 5.5
16
20
1.2
80
Propagation delay
2.0
27
44
56
tPHL
Propagation delay
MR to Qn
Figure 2
2.7
20
33
41
ns
MR to Qn
3.0 to 3.6
152
26
33
4.5 to 5.5
22
28
Clock pulse width
2.0
34
9
41
tW
Clock pulse width
HIGH or LOW
Figure 1
2.7
25
6
30
ns
HIGH or LOW
3.0 to 3.6
20
52
24
Master reset pulse
2.0
34
10
41
tW
Master reset pulse
width LOW
Figure 2
2.7
25
8
30
ns
width LOW
3.0 to 3.6
20
62
24
1.2
–10
t
Removal time
Figure 2
2.0
5
–4
5
ns
trem
MR to CP
Figure 2
2.7
5
–3
5
ns
3.0 to 3.6
5
–22
5
1.2
20
t
Set-up time
Figure 3
2.0
22
7
26
ns
tsu
Dn to CP
Figure 3
2.7
16
5
19
ns
3.0 to 3.6
13
42
15
1.2
–10
th
Hold time
Figure 3
2.0
5
–4
5
ns
th
Dn to CP
Figure 3
2.7
5
–3
5
ns
3.0 to 3.6
5
–22
5
Maximum clock
2.0
14
40
12
fmax
Maximum clock
pulse frequency
Figure 1
2.7
19
75
16
MHz
ulse frequency
3.0 to 3.6
24
1002
20
NOTE:
1. Unless otherwise stated, all typical values are at Tamb = 25°C.
2. Typical value measured at VCC = 3.3V.
3. Typical value measured at VCC = 5.0V.
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