參數(shù)資料
型號: 74LVC1G07GW/DG,125
廠商: NXP Semiconductors
文件頁數(shù): 15/18頁
文件大?。?/td> 0K
描述: IC BUFF OPEN DRAIN N-INV 5TSSOP
產(chǎn)品培訓模塊: Logic Packages
標準包裝: 3,000
系列: 74LVC
邏輯類型: 緩沖器/線路驅動器,非反相并帶開漏極
元件數(shù): 1
每個元件的位元數(shù): 1
輸出電流高,低: 32mA,32mA
電源電壓: 2 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP(5 引線),SC-88A,SOT-353
供應商設備封裝: 5-TSSOP
包裝: 帶卷 (TR)
其它名稱: 74LVC1G07GW/DG-G
74LVC1G07GW/DG-G-ND
935283543125
74LVC1G07
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 11 — 29 June 2012
6 of 18
NXP Semiconductors
74LVC1G07
Buffer with open-drain output
11. Dynamic characteristics
[1]
Typical values are measured at Tamb =25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2]
tpd is the same as tPLZ and tPZL.
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(C
L VCC
2
f
o) = sum of outputs.
12. Waveforms
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 9.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Max
Min
Max
tpd
propagation delay
A to Y; see Figure 8
VCC = 1.65 V to 1.95 V
1.0
2.6
6.7
1.0
8.4
ns
VCC = 2.3 V to 2.7 V
0.5
1.7
5.5
0.5
7.0
ns
VCC = 2.7 V
0.5
2.3
4.7
0.5
6.0
ns
VCC = 3.0 V to 3.6 V
0.5
2.2
4.2
0.5
5.5
ns
VCC = 4.5 V to 5.5 V
0.5
1.6
3.5
0.5
4.5
ns
CPD
power dissipation
capacitance
VI = GND to VCC; VCC = 3.3 V
-7.0
-
pF
Measurement points are given in Table 9.
VOL is the typical output voltage level that occurs with the output load.
Fig 8.
The input (A) to output (Y) propagation delays
mna626
tPLZ
VX
Y output
A input
VI
VCC
VM
VOL
GND
tPZL
VM
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