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參數(shù)資料
| 型號(hào)： | 74LVC1G18 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 1-of-2 non-inverting demultiplexer with 3-state deselected output |
| 中文描述： | 2選1非反相3態(tài)多路解復(fù)用器 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大小： | 91K |
| 代理商： | 74LVC1G18 |
9397 750 13762
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 18 October 2004
11 of 17
Philips Semiconductors
74LVC1G175
Single D-type flip-flop with reset; positive-edge trigger
Measurement points are given in
Table 9
.
V
OL
and V
OH
are typical output voltage drop that occur with the output load.
The master reset (MR) input to output (Q) propagation delays, the master reset
pulse width and the MR to CP removal time.
Fig 7.
Test data is given in
Table 10
.
Definitions for test circuit:
R
L
= Load resistor.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse
generator.
Fig 8.
Load circuitry for switching times.
Table 10:
Supply voltage
V
CC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Test data
Input
V
I
V
CC
V
CC
2.7 V
2.7 V
V
CC
Load
C
L
30 pF
30 pF
50 pF
50 pF
50 pF
V
EXT
t
PLH
, t
PHL
open
open
open
open
open
R
L
1 k
500
500
500
500
t
PZH
, t
PHZ
GND
GND
GND
GND
GND
t
PZL
, t
PLZ
2
×
V
CC
2
×
V
CC
6 V
6 V
2
×
V
CC
001aaa464
MR input
CP input
Q output
t
PHL
t
W
t
rem
V
M
V
I
GND
V
I
V
OH
V
OL
GND
V
M
V
M
V
EXT
V
CC
V
I
V
O
mna616
D.U.T.
C
L
R
T
R
L
R
L
PULSE
GENERATOR
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