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參數(shù)資料
| 型號： | 74LVC1G74DC,125 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 2/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SNGL D FF POS-EDG TRIG 8VSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標準包裝： | 1 |
| 系列： | 74LVC |
| 功能： | 設(shè)置（預(yù)設(shè)）和復(fù)位 |
| 類型： | D 型 |
| 輸出類型： | 差分 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 1 |
| 頻率 - 時鐘： | 200MHz |
| 延遲時間 - 傳輸： | 2.5ns |
| 觸發(fā)器類型： | 正邊沿 |
| 輸出電流高，低： | 32mA，32mA |
| 電源電壓： | 1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VFSOP（0.091"，2.30mm 寬） |
| 包裝： | 標準包裝 |
| 產(chǎn)品目錄頁面： | 840 (CN2011-ZH PDF) |
| 其它名稱： | 568-4494-6 |
74LVC1G74
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 12 — 2 April 2013
10 of 25
NXP Semiconductors
74LVC1G74
Single D-type flip-flop with set and reset; positive edge trigger
[1]
Typical values are measured at Tamb =25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2]
tpd is the same as tPLH and tPHL.
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(C
L VCC
2
f
o) = sum of outputs.
trec
recovery time
SD or RD; see Figure 9
VCC = 1.65 V to 1.95 V
1.9
-
1.9
-
ns
VCC = 2.3 V to 2.7 V
1.4
-
1.4
-
ns
VCC = 2.7 V
1.3
-
1.3
-
ns
VCC = 3.0 V to 3.6 V
+1.2
3.0
-
+1.2
-
ns
VCC = 4.5 V to 5.5 V
1.0
-
1.0
-
ns
tsu
set-up time
D to CP; see Figure 8
VCC = 1.65 V to 1.95 V
2.9
-
2.9
-
ns
VCC = 2.3 V to 2.7 V
1.7
-
1.7
-
ns
VCC = 2.7 V
1.7
-
1.7
-
ns
VCC = 3.0 V to 3.6 V
1.3
0.5
-
1.3
-
ns
VCC = 4.5 V to 5.5 V
1.1
-
1.1
-
ns
th
hold time
D to CP; see Figure 8
VCC = 1.65 V to 1.95 V
1.5
-
1.5
-
ns
VCC = 2.3 V to 2.7 V
1.0
-
1.0
-
ns
VCC = 2.7 V
1.0
-
1.0
-
ns
VCC = 3.0 V to 3.6 V
1.0
0.6
-
1.0
-
ns
VCC = 4.5 V to 5.5 V
1.0
-
1.0
-
ns
fmax
maximum
frequency
CP; see Figure 8
VCC = 1.65 V to 1.95 V
80
-
80
-
MHz
VCC = 2.3 V to 2.7 V
175
-
175
-
MHz
VCC = 2.7 V
175
-
175
-
MHz
VCC = 3.0 V to 3.6 V
175
280
-
175
-
MHz
VCC = 4.5 V to 5.5 V
200
-
200
-
MHz
CPD
power dissipation
capacitance
VI = GND to VCC;
VCC =3.3 V
-15-
-
pF
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
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| 74LVC1G74DP,125 | 功能描述:觸發(fā)器 SNGL D-TYPE POSITIVE RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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