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參數資料
| 型號： | 74LVCH32244AEC/G;5 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 1/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BUFF DVR TRI-ST 32BIT 96LFBGA |
| 產品培訓模塊： | Logic Packages |
| 標準包裝： | 1,425 |
| 系列： | 74LVCH |
| 邏輯類型： | 緩沖器/線路驅動器，非反相 |
| 元件數： | 8 |
| 每個元件的位元數： | 4 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 1.2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 96-LFBGA |
| 供應商設備封裝： | 96-LFBGA（13.5x5.5） |
| 包裝： | 托盤 |
| 其它名稱： | 74LVCH32244AEC/G 74LVCH32244AEC/G-ND 935277682557 |
1.
General description
The 74LVCH32244A is a high-performance, low-power, low-voltage, Si-gate CMOS
device and superior to most advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 V or 5.0 V devices. In 3-state operation outputs can handle 5 V.
These features allow the use of these devices as translators in a mixed 3.3 V and 5 V
environment.
The 74LVCH32244A is a 32-bit non-inverting buffer/line driver with 3-state outputs. The
3-state outputs are controlled by eight output enable outputs (1OE to 8OE). A HIGH on pin
nOE causes the outputs to assume a high-impedance OFF-state.
To ensure the high-impedance state during power-up or power-down, pin nOE should be
tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by
the current-sinking capability of the driver.
Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused
or floating data inputs at a valid logic level.
2.
Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low-power consumption
MULTIBYTE flow-through standard pinout architecture
Low inductance multiple power and ground pins for minimum noise and ground
bounce
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
All data inputs have bus hold
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C to +85 C
Packaged in plastic fine-pitch ball grid array package
74LVCH32244A
32-bit buffer/line driver; 5 V input/output tolerant; 3-state
Rev. 3 — 16 December 2011
Product data sheet
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 74LVCH32244AEC-S | 功能描述:緩沖器和線路驅動器 32-BIT 5V TOL I/O BUFFER 3-S RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74LVCH32244AEC-T | 功能描述:緩沖器和線路驅動器 32-BIT 5V TOL I/O BUFFER 3-S RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74LVCH32244AX4BF | 制造商:Rochester Electronics LLC 功能描述: 制造商:Integrated Device Technology Inc 功能描述: |
| 74LVCH32245ABF | 功能描述:總線收發(fā)器 32-bit Bus Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVCH32245ABF8 | 功能描述:總線收發(fā)器 32-bit Bus Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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