參數(shù)資料
型號(hào): 74LVCH32244AEC/G;5
廠商: NXP Semiconductors
文件頁數(shù): 4/12頁
文件大?。?/td> 0K
描述: IC BUFF DVR TRI-ST 32BIT 96LFBGA
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 1,425
系列: 74LVCH
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 8
每個(gè)元件的位元數(shù): 4
輸出電流高,低: 24mA,24mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 96-LFBGA
供應(yīng)商設(shè)備封裝: 96-LFBGA(13.5x5.5)
包裝: 托盤
其它名稱: 74LVCH32244AEC/G
74LVCH32244AEC/G-ND
935277682557
74HC_HCT4060_3
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 14 July 2008
12 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
[1]
tpd is the same as tPHL and tPLH.
[2]
Qn+1 is the next Qn output.
[3]
tt is the same as tTHL and tTLH.
[4]
CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(C
L × VCC
2
× f
o) = sum of outputs.
12. Waveforms
CPD
power
dissipation
capacitance
VI = GND to VCC 1.5 V;
VCC =5V; fi = 1 MHz
-40
-
pF
Table 6.
Dynamic characteristics …continued
GND = 0 V; CL = 50 pF unless otherwise specied; for test circuit see Figure 11.
Symbol Parameter
Conditions
25
°C
40 °C to +85 °C 40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
Measurement points are given in Table 7.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8.
Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output
transition times and the maximum clock frequency
001aai118
RS input
1/fmax
tW
tTHL
tTLH
tPHL
tPLH
VOH
VI
GND
VOL
VM
10 %
90 %
10 %
Q3 output
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