參數(shù)資料
型號(hào): 74LVTH125SJ
廠商: Fairchild Semiconductor
文件頁數(shù): 5/9頁
文件大小: 0K
描述: IC BUFF TRI-ST QD LOW V 14SOP
標(biāo)準(zhǔn)包裝: 47
系列: 74LVTH
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 4
每個(gè)元件的位元數(shù): 1
輸出電流高,低: 32mA,64mA
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 管件
1998 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LVTH125 Rev. 1.4.0
5
74L
VTH125
Lo
w
V
olta
g
e
Quad
Buff
er
with
3-ST
A
TE
Outputs
Dynamic Switching Characteristics(6)
Notes:
6. Characterized in SOIC package. Guaranteed parameter, but not tested.
7. Max number of outputs defined as (n). n–1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
Notes:
8. All typical values are at VCC = 3.3V, TA = 25°C.
9. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
separate outputs of the same device. The specification applies to any outputs switching in the same direction,
either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Capacitance(10)
Note:
10. Capacitance is measured at frequency f
= 1MHz, per MIL-STD-883B, Method 3012.
Symbol
Parameter
VCC (V)
Conditions
TA = 25°C
Units
CL = 50 pF, RL = 500
Min.
Typ.
Max.
VOLP
Quiet Output Maximum
Dynamic VOL
3.3
(7)
0.8
V
VOLV
Quiet Output Minimum
Dynamic VOL
3.3
(7)
–0.8
V
Symbol
Parameter
TA = –40°C to +85°C,
CL = 50pF, RL = 500
Units
VCC = 3.3V ± 0.3V
VCC = 2.7V
Min.
Typ.(8)
Max.
Min.
Max.
tPLH
Propagation Delay, Data to Output
1.0
3.5
1.0
4.5
ns
tPHL
1.0
3.9
1.0
4.9
tPZH
Output Enable Time
1.0
4.0
1.0
5.5
ns
tPZL
1.1
4.0
1.1
5.4
tPHZ
Output Disable Time
1.5
4.5
1.5
5.7
ns
tPLZ
1.3
4.5
1.3
4.0
tOSHL, tOSLH
Output to Output Skew(9)
1.0
ns
Symbol
Parameter
Conditions
Typical
Units
CIN
Input Capacitance
VCC = 0V, VI = 0V or VCC
4pF
COUT
Output Capacitance
VCC = 3.0V, VO = 0V or VCC
8pF
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