參數(shù)資料
型號(hào): 7640
英文描述: IrDA. protocol handler plus endec for DCE Apps, -40C to +85C, 18-PDIP, TUBE
中文描述: 7640組數(shù)據(jù)表數(shù)據(jù)表1885K/SEP.05.00
文件頁(yè)數(shù): 7/97頁(yè)
文件大?。?/td> 1885K
代理商: 7640
6
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
1.9 CENTRAL PROCESSING UNIT
The central processing unit (CPU) has six registers:
Accumulator (A)
Index Register X (X)
Index Register Y (Y)
Stack Pointer (S)
Processor Status Register (PS)
Program Counter (PC)
1.9.1 Register Structure
Five of the CPU registers are 8-bit registers. These are
the Accumulator (A), Index register X (X), Index Regis-
ter Y (Y), Stack pointer (S), and the Processor Status
register (PS) as shown in Figure 1.4.
The Program counter (PC) is a 16-bit register consist-
ing of two 8-bit registers (PCH and PCL).
After a hardware reset, bit 2 (I Flag) of the PS is set
high and the values at the address FFFA
16
and
FFFB
16
are stored in the PC, but the values of the
other bits of the PS and other registers are undefined.
Initialization of the undefined registers may be neces-
sary for some programs.
0
7
Accumulator
0
7
Index Register X
0
7
Index Register Y
0
7
Stack Pointer
0
7
PC
L
15
PC
H
0
7
Carry Flag (bit 0)
Zero Flag (bit 1
)
Interrupt Disable Flag (bit 2)
Decimal Mode Flag (bit 3)
Break Flag (bit 4)
Index X Mode Flag (bit 5)
Overflow Flag (bit 6)
Negative Flag (bit 7)
Program Counter
D I
Z C
N V T B
Processor Status Register
Fig. 1.4. Register Structure
相關(guān)PDF資料
PDF描述
7641 7641 Group Datasheet Datasheet 2145K/MAR.26.02
7643 IrDA. protocol handler plus endec for DCE Apps, -40C to +85C, 18-SOIC 300mil, TUBE
765-11-(SERIES) Analog IC
765-11-20K Analog IC
765-11-25A Analog IC
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