參數(shù)資料
型號： 7ABT646APWDH
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： Octal bus transceiver/register 3-State
中文描述： ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
封裝： 4.40 MM, PLASTIC, MO-153AD, SOT-355-1, TSSOP-24
文件頁數(shù)： 2/14頁
文件大?。?/td> 117K
代理商： 7ABT646APWDH
Philips Semiconductors
Product specification
74ABT646A
Octal bus transceiver/register (3-State)
2
1998 Feb 17
853-1553 18978
FEATURES
Combines 74ABT245 and 74ABT374 type functions in one device
Independent registers for A and B buses
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
Multiplexed real-time and stored data
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT646A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT646A transceiver/register consists of bus transceiver
circuits with 3-State outputs, D-type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the input
bus or the internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes High. Output
Enable (OE) and DIR pins are provided to control the transceiver
function. In the transceiver mode, data present at the high
impedance port may be stored in either the A or B register or both.
The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real-time. The DIR determines
which bus will receive data when the OE is active (Low). In the
isolation mode (OE = High), data from Bus A may be stored in the B
register and/or data from Bus B may be stored in the A register.
When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of
the two buses, A or B, may be driven at a time. The examples on the
next page demonstrate the four fundamental bus management
functions that can be performed with the 74ABT646A.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
Input capacitance
CP, S, OE, DIR
C
L
= 50pF; V
CC
= 5V
3.2
3.7
ns
C
IN
V
I
= 0V or V
CC
4
pF
C
I/O
I/O capacitance
Outputs disabled;
V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
7
pF
I
CCZ
Total supply current
110
μ
A
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74ABT646A N
74ABT646A D
74ABT646A DB
74ABT646A PW
NORTH AMERICA
74ABT646A N
74ABT646A D
74ABT646A DB
7ABT646APW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
SA00082
CPAB
SAB
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
2
3
4
5
6
7
8
9
10
11
12
V
CC
CPBA
SBA
OE
B0
B1
B2
B3
B4
B5
B6
B7
13
14
15
16
17
18
19
20
21
22
23
24
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1, 23
CPAB /
CPBA
A to B clock input / B to A clock
input
2, 22
SAB / SBA
A to B select input / B to A
select input
3
DIR
Direction control input
4, 5, 6, 7,
8, 9, 10, 11
A0 – A7
Data inputs/outputs (A side)
20, 19, 18, 17,
16, 15, 14, 13
B0 – B7
Data inputs/outputs (B side)
21
OE
Output enable input
(active-Low)
12
GND
Ground (0V)
24
V
CC
Positive supply voltage
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