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參數(shù)資料
| 型號(hào)： | 7ABT646APWDH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal bus transceiver/register 3-State |
| 中文描述： | ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 4.40 MM, PLASTIC, MO-153AD, SOT-355-1, TSSOP-24 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 117K |
| 代理商： | 7ABT646APWDH |
Philips Semiconductors
Product specification
74ABT646A
Octal bus transceiver/register (3-State)
1998 Feb 17
7
AC CHARACTERISTICS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V
±
0.5V
Min
UNIT
Min
Typ
Max
Max
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
1
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum clock frequency
1
125
350
125
MHz
Propagation delay
CPAB to Bn or CPBA to An
1
2.2
1.7
3.9
4.4
5.1
5.2
1
2.2
1.7
5.6
5.6
ns
Propagation delay
An to Bn or Bn to An
2
1.5
1.5
3.2
3.7
4.3
4.6
1.5
1.5
4.8
5.4
ns
Propagation delay
SAB to Bn or SBA to An
2
3
1.5
1.5
3.8
4.4
5.1
5.3
1
1.5
1.5
6.5
5.9
ns
Output enable time
OE to An or Bn
5
6
1.5
3.0
3.5
4.5
5.3
7.4
4.8
1
4.0
1.5
3.0
6.3
8.8
5.3
1
4.5
ns
Output disable time
OE to An or Bn
5
6
1.5
1.5
4.0
3.3
1.5
1.5
ns
Output enable time
DIR to An or Bn
5
6
1.5
2.5
3.9
4.7
5.7
9.0
1.2
2.5
6.7
9.5
ns
Output disable time
DIR to An or Bn
5
6
1.5
1.5
4.0
3.5
5.0
4.7
1.5
1.5
5.7
6.0
ns
1. This data sheet limit may vary among suppliers.
AC SETUP REQUIREMENTS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
Min
T
amb
= -40 to +85
o
C
V
CC
= +5.0V
±
0.5V
Min
UNIT
Typ
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
Setup time
An to CPAB, Bn to CPBA
4
3.0
3.0
0.7
0.7
3.0
3.0
ns
Hold time
An to CPAB, Bn to CPBA
4
0.0
0.0
–0.5
–0.5
0.0
0.0
ns
Pulse width, High or Low
CPAB or CPBA
1
4.0
4.0
0.9
1.4
4.0
4.0
ns
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