參數資料
型號: 7LVT2952PWDH
廠商: NXP Semiconductors N.V.
英文描述: 3.3V LVT octal registered transceiver 3-State
中文描述: 3.3小型終端收發(fā)器八注冊三態(tài)
文件頁數: 2/12頁
文件大?。?/td> 102K
代理商: 7LVT2952PWDH
Philips Semiconductors
Product specification
74LVT2952
3.3V Octal registered transceiver (3-State)
2
1998 Feb 19
853-1765 18987
FEATURES
8-bit registered transceiver
Independent registers for A and B buses
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5V bus
Power-up reset
Power-up 3-State
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The LVT2952 is a high-performance BiCMOS product designed for
V
CC
operation at 3.3V.
This device combines low static and dynamic power dissipation with
high speed and high output drive.
The 74LVT2952 device is an 8-bit registered transceiver. Two 8-bit
back-to-back registers store data flowing in both directions between
two bidirectional buses.
Data applied to the inputs is entered and stored on the rising edge of
the Clock (CPXX) provided that the Clock Enable (CEXX) is Low.
The data is then present at the 3-State output buffers, but is only
accessible when the Output Enable (OEXX) is Low. Data flow from
A inputs to B outputs is the same as for B inputs to A outputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
CPBA to An or
CPAB to Bn
C
L
= 50pF; V
CC
= 3.3V
3.1
3.8
ns
C
IN
Input capacitance
V
I
= 0V or 3.0V
4
pF
C
I/O
I/O pin capacitance
Outputs disabled; V
I/O
= 0V or 3.0V
8
pF
I
CCZ
Total supply current
Outputs disabled; V
CC
= 3.6V
0.13
mA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic SOL
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74LVT2952 D
74LVT2952 DB
74LVT2952 PW
NORTH AMERICA
74LVT2952 D
74LVT2952 DB
7LVT2952PW DH
DWG NUMBER
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
15
16
17
18
19
20
21
22
23
24
B7
B6
B5
B4
B3
B2
B1
B0
OEAB
A0
CPAB
A1
A2
A3
A4
A5
A6
A7
V
CC
OEBA
11
14
CEAB
CPBA
12
13
GND
CEBA
SV00036
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
10, 14
CPAB / CPBA
Clock input A to B /
Clock input B to A
11, 13
CEAB / CEBA
Clock enable input A to B /
Clock enable input B to A
16, 17, 18,
19, 20, 21,
22, 23
A0 – A7
Data inputs/outputs (A side)
8, 7, 6, 5,
4, 3, 2, 1
B0 – B7
Data outputs/outputs (B side)
9, 15
OEAB / OEBA
Output enable inputs
12
GND
Ground (0V)
24
V
CC
Positive supply voltage
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