- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378210 > 80960CF-25 (Intel Corp.) 32-Bit High-Performance Superscalar Embedded Microprocessor(32位高性能超標量嵌入式微處理器) PDF資料下載
參數(shù)資料
| 型號： | 80960CF-25 |
| 廠商： | Intel Corp. |
| 英文描述： | 32-Bit High-Performance Superscalar Embedded Microprocessor(32位高性能超標量嵌入式微處理器) |
| 中文描述： | 32位高性能嵌入式微處理器超標量（32位高性能超標量嵌入式微處理器） |
| 文件頁數(shù)： | 14/77頁 |
| 文件大?。?/td> | 927K |
| 代理商： | 80960CF-25 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁
8
PRELIMINARY
80960CF-40, -33, -25, -16
A
HOLDA
O
S
H(1)
R(Q)
HOLD ACKNOWLEDGE
indicates to a bus requestor that the processor has relin-
quished control of the external bus. When HOLDA is asserted, the external address
bus, data bus and bus control signals are floated. HOLD, BOFF, HOLDA and BREQ are
used together to arbitrate access to the processor’s external bus by external bus
agents. Since the processor grants HOLD requests and enters the Hold Acknowledge
state even while RESET is asserted, the state of the HOLDA pin is independent of the
RESET pin.
BUS REQUEST
is asserted when the bus controller has a request pending. BREQ can
be used by external bus arbitration logic in conjunction with HOLD and HOLDA to deter-
mine when to return mastership of the external bus to the processor.
BREQ
O
S
H(Q)
R(0)
O
S
H(Z)
R(Z)
O
S
H(Z)
R(Z)
O
S
H(Z)
R(Z)
D/C
DATA OR CODE
is asserted for a data request and deasserted for instruction requests.
D/C has the same timing as W/R.
DMA
DMA ACCESS
indicates whether the bus request was initiated by the DMA controller.
DMA is asserted for any DMA request. DMA is deasserted for all other requests.
SUP
SUPERVISOR ACCESS
indicates whether the bus request is issued while in super-
visor mode. SUP is asserted when the request has supervisor privileges and is
deasserted otherwise. SUP can be used to isolate supervisor code and data structures
from non-supervisor requests.
Table 2. 80960CF Pin Description — External Bus Signals
(Sheet 3 of 3)
Name
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 80960CF-33 | 32-Bit High-Performance Superscalar Embedded Microprocessor(32位高性能超標量嵌入式微處理器) |
| 80960CF-40 | 32-Bit High-Performance Superscalar Embedded Microprocessor(32位高性能超標量嵌入式微處理器) |
| 80960CF | 32-Bit High-Performance Superscalar Processor(32位高性能超標量處理器) |
| 80960JD | EMBEDDED 32-BIT MICROPROCESSOR |
| 80960JT | EMBEDDED 32-BIT MICROPROCESSOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 80960CF-30 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SPECIAL ENVIRONMENT 80960CF-30, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR |
| 80960CF-33 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESSOR |
| 80960CF-40 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESSOR |
| 80960HA | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80960HA/HD/HT 32-Bit High-Performance Superscalar Processor |
| 80960HD | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80960HA/HD/HT 32-Bit High-Performance Superscalar Processor |
發(fā)布緊急采購，3分鐘左右您將得到回復。