2010-2012 Peregrine Semiconductor Corp. All rights reserved." />
參數(shù)資料
型號(hào): 83336-22
廠商: Peregrine Semiconductor
文件頁(yè)數(shù): 10/12頁(yè)
文件大?。?/td> 0K
描述: IC PLL INTEGER-N 3GHZ 44CQFJ
標(biāo)準(zhǔn)包裝: 500
系列: UltraCMOS™
類型: 時(shí)鐘緩沖器/驅(qū)動(dòng)器,多路復(fù)用器
PLL:
主要目的: 軍事應(yīng)用
輸入: 時(shí)鐘
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 是/無(wú)
頻率 - 最大: 3GHz
電源電壓: 2.85 V ~ 3.15 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 44-CLCC 裸露焊盤
供應(yīng)商設(shè)備封裝: 44-CQFJ(16.51x16.51)
包裝: 帶卷 (TR)
其它名稱: PE83336
Product Specification
PE83336
Page 7 of 12
Document No. 70-0137-05 │ www.psemi.com
2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Functional Description
The PE83336 consists of a prescaler, counters, a
phase detector and control logic. The dual
modulus prescaler divides the VCO frequency by
either 10 or 11, depending on the value of the
modulus select. Counters “R” and “M” divide the
reference and prescaler output, respectively, by
integer values stored in a 20-bit register. An
additional counter (“A”) is used in the modulus
select logic. The phase-frequency detector
generates up and down frequency control signals.
The control logic includes a selectable chip
interface. Data can be written via serial bus,
parallel bus, or hardwired direct to the pins. There
are also various operational and test modes and
lock detect.
Figure 4. Functional Block Diagram
Control
Logic
R Counter
(6-bit)
Phase
Detector
fc
PD_U
PD_D
R(5:0)
M(8:0)
A(3:0)
D(7:0)
Sdata
Control
Pins
fr
Modulus
Select
10/11
Prescaler
M Counter
(9-bit)
2k
Cext
fp
Fin
Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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