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參數資料
| 型號： | 873034AGLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 873034 SERIES, LOW SKEW CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 4.40 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, TSSOP-16 |
| 文件頁數： | 3/16頁 |
| 文件大?。?/td> | 298K |
| 代理商： | 873034AGLFT |
873034AM
11
REV. A JANUARY 17, 2008
ICS873034
LOW SKEW, ÷2, ÷4, ÷8 DIFFERENTIAL-TO-
2.5V, 3.3V LVPECL/ECL CLOCK GENERATOR
PRELIMINARY
APPLICATION SCHEMATIC EXAMPLE
Figure 1 shows an example of ICS873034 application sche-
matic. In this example, the device is operated at V
CC = 3.3V.
The decoupling capacitor should be located as close as pos-
sible to the power pin. The input is driven by a 3.3V LVPECL
R8
50
Zo = 50 Ohm
(U1-3)
R9
50
R2
82.5
3.3V
Zo = 50 Ohm
R10
50
R5
50
LVPECL
R6
50
C1
0.1uF
Zo = 50 Ohm
Optional
Y-Termination
U1
ICS873034
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Q0
nQ0
VCC
Q1
nQ1
VCC
Q2
nQ2
VEE
MR
VBB
nCLK
CLK
nc
nEN
VCC
R1
133
C2
0.1uF
+
-
3.3V
R4
82.5
(U1-16)
Zo = 50 Ohm
R7
50
R3
133
C3
0.1uF
Zo = 50 Ohm
+
-
3.3V
(U1-6)
3.3V
driver. For the LVPECL output drivers, only two terminations
examples are shown in this schematic. More termination ap-
proaches are shown in the LVPECL Termination Application
Note.
FIGURE 6. ICS873034 APPLICATION SCHEMATIC EXAMPLE
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