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參數(shù)資料
| 型號： | 89C1051 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大小： | 151K |
| 代理商： | 89C1051 |
AT89C1051
4-12
Float Waveforms
(1)
Note:
1.
For timing purposes, a port pin is no longer float-
ing when a 100 mV change load voltage occurs. A
port pin begins to float when a 100 mV change
from the loaded V
OH
/V
OL
level occurs.
AC Testing Input/Output Waveforms
(1)
Note:
1.
AC Inputs during testing are driven at V
CC
- 0.5V for a
logic 1 and 0.45V for a logic 0. Timing measurements
are made at V
IH
min. for a logic 1 and V
IL
max. for a
logic 0.
External Clock Drive Waveforms
External Clock Drive
Symbol
Parameter
V
CC
= 2.7V to 6.0V
V
CC
= 4.0V to 6.0V
Units
Min
Max
Min
Max
1/t
CLCL
Oscillator Frequency
0
12
0
24
MHz
t
CLCL
Clock Period
83.3
41.6
ns
t
CHCX
High Time
30
15
ns
t
CLCX
Low Time
30
15
ns
t
CLCH
Rise Time
20
20
ns
t
CHCL
Fall Time
20
20
ns
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