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參數(shù)資料
| 型號： | 908E621_07 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror |
| 中文描述： | 綜合四半橋和三高的嵌入式微控制器和LIN高端側鏡 |
| 文件頁數(shù)： | 48/62頁 |
| 文件大小： | 540K |
| 代理商： | 908E621_07 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
48
908E621
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
SPI REGISTER OVERVIEW
TABLE 13
SUMMARIZES THE SPI REGISTER ADDRESSES AND THE BIT NAMES OF EACH REGISTER.
Table 13. SPI Register Overview
Addr
Register Name
R/W
Bit
7
6
5
4
3
2
1
0
$00
System Control
(SYSCTL)
R
PSON
0
0
HTIS1
HTIS0
VIS
SRS1
SRS0
W
STOP
SLEEP
$01
Half-Bridge Output
(HBOUT)
R
HB4_H
HB4_L
HB3_H
HB3_L
HB2_H
HB2_L
HB1_H
HB1_L
W
$02
High-Side Output
(HSOUT)
R
HVDDON
0
HS3PWM
HS2PWM
HS1PWM
HS3ON
HS2ON
HS1ON
W
$03
Half-Bridge Status and
Control (HBSCTL)
R
CRM
0
0
0
HB4OCF
HB3OCF
HB2OCF
HB1OCF
W
$04
High-Side Status and
Control (HSSCTL)
R
HVDDOCF
0
0
0
0
HS3OCF
HS2OCF
HS1OCF
W
$05
Reserved
R
reserved
W
$06
Reserved
R
reserved
W
$07
H0/L0 Status and
Control (HLSCTL)
R
L0F
0
0
H0OCF
H0F
H0EN
H0PD
H0MS
W
$08
A0 and Multiplexer
Control (A0MUCTL)
R
CSON
CSSEL1
CSSEL0
CSA
SS3
SS2
SS1
SS0
W
$09
Interrupt Mask
(IMR)
R
L0IE
H0IE
LINIE
HTRD
HTIE
LVIE
HVIE
PSFIE
W
$0A
Interrupt Flag
(IFR)
R
L0IF
H0IF
LINIF
0
HTIF
LVIF
HVIF
PSFIF
W
$0B
Watchdog Control
(WDCTL)
R
WDRE
WDP1
WDP0
0
0
0
0
0
W
WDRST
$0C
System Status
(SYSSTAT)
R
LINCL
HTIF
VF
H0F
HVDDF
HSF
HBF
0
W
$0D
Reset Status
(RSR)
R
POR
PINR
WDR
HTR
LVR
0
LINWF
L0WF
W
$0E
System Test
(SYSTEST)
R
reserved
W
$0F
System Trim 1
(SYSTRIM1)
R
HVDDT1
HVDDT0
reserved
reserved
itrim3
itrim2
itrim1
itrim0
W
$10
System Trim 2
(SYSTRIM2)
R
0
0
0
0
0
0
0
0
W
CRHBHC1
CRHBHC0
CRHB5
CRHB4
CRHB3
CRHB2
CRHB1
CRHB0
$11
System Trim 3
(SYSTRIM3)
R
0
0
0
0
0
0
0
0
W
CRHBHC3
CRHBHC2
CRHS5
CRHS4
CRHS3
CRHS2
CRHS1
CRHS0
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| 908E624 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Triple High-Side Switch with Embedded MCU and LIN Serial Communication for Relay Drivers |
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