參數(shù)資料
型號(hào)： 9148BF-36LF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時(shí)鐘產(chǎn)生/分配
英文描述： 83.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝： 0.300 INCH, SSOP-48
文件頁數(shù)： 15/18頁
文件大?。?/td> 559K
代理商： 9148BF-36LF
6
ICS9148-36
Byte 3: SDRAMActive/Inactive Register
(1 = enable, 0 = disable)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
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7
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6
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B9
21
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6
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5
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31
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5
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4
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31
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4
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3
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31
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3
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2
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31
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2
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1
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Byte 4: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Byte5:Peripheral Active/InactiveRegister
(1 = enable, 0 = disable)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
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0
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6
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4
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3
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5
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4
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41
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(
2
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0
t
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1
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R
Byte 6: Optional Register for Possible
Furture Requirements
Notes:
1. Byte 6 is reserved by Integrated Circuit Systems for futue
applications.
t
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B#
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W
Pn
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p
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7
t
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d
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(
6
t
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B-
1
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d
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r
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R
(
5
t
i
B-
1
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d
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s
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(
4
t
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d
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(
3
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2
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(
1
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(
0
t
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1
)
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