參數(shù)資料
型號: 92HD206DX5PRGXYYX8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 編解碼器
英文描述: PCM CODEC, PQFP48
封裝: ROHS COMPLIANT, LQFP-48
文件頁數(shù): 113/176頁
文件大?。?/td> 1463K
代理商: 92HD206DX5PRGXYYX8
92HD206
8-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
IDT
8-CHANNEL HIGH DEFINITION AUDIO CODEC
41
92HD206
V 1.2 112006
IDT CONFIDENTIAL
6.2.20. AFG TCKT
6.2.21. AFG Sply
Table 49. AFG TCKT Command Verb Format
Verb ID
Payload
Response
Get
FE5
00
See bitfield table.
Set1
7E5
See bits [7:0] of bitfield table.
0000_0000h
Table 50. AFG TCKT Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31:8]
Rsvd
R
0x0
Reserved
[7]
AnaD3Enable
RW
0x0
D3 enable signal for analog
[6:0]
TCKT
RW
0x0
Test circuit (default reset on) TBD [6:0]
Table 51. AFG Sply Command Verb Format
Verb ID
Payload
Response
Get
FE6
00
See bitfield table.
Set1
7E6
See bits [7:0] of bitfield table.
0000_0000h
Table 52. AFG Sply Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31:7]
Rsvd
R
0x0
Reserved
[6:5]
IBIAS
RW
0x0
00 = Normal Current;
01 = 80% nominal Analog Current;
10 = 120% nominal Analog Current;
11 = 140% nominal Analog Current
[4]
PinLvl
RW
0x1
0 = low-level SPDIF Input (special buffer for low
level signals)
1 = standard SPDIF Input (for high level signals)
[3:0]
SplyOvr
RW
0x0
Supply Override Control. See Table below.
0 = invert ADC supply;
1 = invert DAC supply;
2 = supply value;
3 = supply override enable
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