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參數(shù)資料
| 型號： | 930105001 |
| 廠商： | ATMEL CORP |
| 元件分類： | SRAM |
| 英文描述： | 8K X 16 DUAL-PORT SRAM, 30 ns, QFP84 |
| 封裝： | 1.150 X 1.150 INCH, MQFP-84 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 686K |
| 代理商： | 930105001 |
December 1990
5
Philips Semiconductors
Product specication
8-bit serial-in/parallel-out shift register
74HC/HCT164
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
WAVEFORMS
+25
40 to +85
40 to +125
min.
typ.
max.
min.
max.
min.
max.
tPHL/ tPLH
propagation delay
CP to Qn
41
15
12
170
34
29
215
43
37
255
51
43
ns
2.0
4.5
6.0
Fig.6
tPHL
propagation delay
MR to Qn
39
14
11
140
28
24
175
35
30
210
42
36
ns
2.0
4.5
6.0
Fig.6
tTHL/ tTLH
output transition
time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.6
tW
clock pulse width
HIGH or LOW
80
16
14
5
4
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.6
tW
master reset pulse
width; LOW
60
12
10
17
6
5
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.6
trem
removal time
MR to CP
60
12
10
17
6
5
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.6
tsu
set-up time
Dsa, Dsb to CP
60
12
10
8
3
2
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.6
th
hold time
Dsa,Dsb to CP
4
6
2
4
ns
2.0
4.5
6.0
Fig.6
fmax
maximum clock
pulse frequency
6
30
35
23
71
85
5
24
28
4
20
24
MHz
2.0
4.5
6.0
Fig.6
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