參數(shù)資料
型號(hào)： 933373600005
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 鎖存器
英文描述： 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC
封裝： WAFER
文件頁(yè)數(shù)： 5/10頁(yè)
文件大小： 104K
代理商： 933373600005
January 1995
4
Philips Semiconductors
Product specication
Dual D-type ip-op
HEF4013B
ip-ops
AC CHARACTERISTICS
VSS =0V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
MIN.
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
CP
→ O, O
5
110
220
ns
83 ns
+ (0,55 ns/pF) CL
HIGH to LOW
10
tPHL
45
90
ns
34 ns
+ (0,23 ns/pF) CL
15
30
60
ns
22 ns
+ (0,16 ns/pF) CL
5
95
190
ns
68 ns
+ (0,55 ns/pF) CL
LOW to HIGH
10
tPLH
40
80
ns
29 ns
+ (0,23 ns/pF) CL
15
30
60
ns
22 ns
+ (0,16 ns/pF) CL
SD → O
5
100
200
ns
73 ns
+ (0,55 ns/pF) CL
HIGH to LOW
10
tPHL
40
80
ns
29 ns
+ (0,23 ns/pF) CL
15
30
60
ns
22 ns
+ (0,16 ns/pF) CL
SD → O
5
75
150
ns
48 ns
+ (0,55 ns/pF) CL
LOW to HIGH
10
tPLH
35
70
ns
24 ns
+ (0,23 ns/pF) CL
15
25
50
ns
17 ns
+ (0,16 ns/pF) CL
CD → O
5
100
200
ns
73 ns
+ (0,55 ns/pF) CL
HIGH to LOW
10
tPHL
40
80
ns
29 ns
+ (0,23 ns/pF) CL
15
30
60
ns
22 ns
+ (0,16 ns/pF) CL
CD → O
5
60
120
ns
33 ns
+ (0,55 ns/pF) CL
LOW to HIGH
10
tPLH
30
60
ns
19 ns
+ (0,23 ns/pF) CL
15
20
40
ns
12 ns
+ (0,16 ns/pF) CL
Output transition times
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
HIGH to LOW
10
tTHL
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
LOW to HIGH
10
tTLH
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
相關(guān)PDF資料
PDF描述
933372660653 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
933372660652 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
933277610652 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
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