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參數(shù)資料
| 型號： | 933493470112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)器 |
| 英文描述： | 4000/14000/40000 SERIES, ASYN POSITIVE EDGE TRIGGERED 17-BIT UP DECADE COUNTER, CDIP18 |
| 封裝： | CERAMIC, DIP-18 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大小： | 63K |
| 代理商： | 933493470112 |
January 1995
3
Philips Semiconductors
Product specication
Quadruple static decade counters
HEF4737B
HEF4737V
Fig.2 Block diagram.
FUNCTIONAL DESCRIPTION
Input signals
Count input (CP)
The signal to be counted is applied to this input. When PL
and MR are LOW the contents of the counter increments
by one at a LOW to HIGH transition of CP.
Reset input (MR)
This is an asynchronous reset. A HIGH level applied to this
input will reset the counter to zero independent of the level
at the count input and preset input.
Preset input (PL)
This is an asynchronous preset. When MR is LOW a HIGH
at the PL input will preset the counter to 19 999
independent of the level at the count input.
Transfer input (T)
A HIGH level applied to this input allows the information
held by the counter to pass to the latches.
Output enable input (EO)
A HIGH level at this input enables the BCD outputs and
information can be read out of the latches using the
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