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參數(shù)資料
| 型號(hào)： | 933748630652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 門(mén)電路 |
| 英文描述： | HCT SERIES, QUAD 2-INPUT NAND GATE, PDIP14 |
| 封裝： | SOT-27-1, DIP-14 |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大?。?/td> | 142K |
| 代理商： | 933748630652 |
Philips Semiconductors - PIP - 74HC/HCT03; Quad 2-input NAND gate
Product Information
74HC/HCT03; Quad
2-input NAND gate
Information as of 2003-04-22
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Download datasheet
Applications
Block diagram
topGeneral description
The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT03 provide the 2-input NAND function.
The 74HC/HCT03 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In
the OFF-state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and VOmax .
This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and
OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level.
topFeatures
q
Level shift capability
q
Output capability: standard (open drain)
q
ICC category: SSI
topDatasheet
Page
count
File size
(kB)
Datasheet
74HC/HCT03 Quad 2-
input NAND
gate
12/1/1990
Product specification 8
52
Additional datasheet info
To complete the device datasheet with package and family information, also download the following PDF files.
The "Logic Package Information" document is required to determine in which package(s) this device is available.
Document
Description
1 Download
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic
Family Specifications
file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT03N.html (1 of 4) [Apr-30-2003 10:03:54 AM]
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