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參數(shù)資料
| 型號： | 933798880652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | FIFO |
| 英文描述： | 64 X 9 OTHER FIFO, 520 ns, PDSO28 |
| 封裝： | SO-28 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 166K |
| 代理商： | 933798880652 |
December 1990
3
Philips Semiconductors
Product specication
9-bit x 64-word FIFO register; 3-state
74HC/HCT7030
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay
CL = 15 pF; VCC =5 V
MR to DIR and DOR
21
26
ns
SO to Qn
36
40
ns
fmax
maximum clock frequency
SI and SO
33
29
MHz
CI
input capacitance
3.5
pF
CP
power dissipation capacitance per package
notes 1 and 2
660
pF
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