參數(shù)資料
型號: 934055412118
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: 75 A, 30 V, 0.0054 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝: PLASTIC, SMD, D2PAK-3
文件頁數(shù): 1/7頁
文件大小: 54K
代理商: 934055412118
Philips Semiconductors
Product specification
TrenchMOS
transistor
BUK9605-30A
Logic level FET
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode logic
SYMBOL
PARAMETER
MAX.
UNIT
level field-effect power transistor in a
plastic envelope suitable for surface
V
DS
Drain-source voltage
30
V
mounting. Using ’trench’ technology
I
D
Drain current (DC)
75
A
the device features very low on-state
P
tot
Total power dissipation
230
W
resistance. It is intended for use in
T
j
Junction temperature
175
C
automotive and general purpose
R
DS(ON)
Drain-source on-state
switching applications.
resistance
V
GS = 5 V
5
m
V
GS = 10 V
4.6
m
PINNING - SOT404
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
(no connection possible)
3
source
mb
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
Drain-source voltage
-
30
V
DGR
Drain-gate voltage
R
GS = 20 k
-30
V
±V
GS
Gate-source voltage
-
10
V
±V
GSM
Non-repetitive gate-source voltage
t
p≤50S
-
15
V
I
D
Drain current (DC)
T
mb = 25 C
-
75
A
I
D
Drain current (DC)
T
mb = 100 C
-
75
A
I
DM
Drain current (pulse peak value)
T
mb = 25 C
-
400
A
P
tot
Total power dissipation
T
mb = 25 C
-
230
W
T
stg, Tj
Storage & operating temperature
-
- 55
175
C
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-mb
Thermal resistance junction to
-
0.65
K/W
mounting base
R
th j-a
Thermal resistance junction to
Minimum footprint, FR4
50
-
K/W
ambient
board
d
g
s
13
mb
2
August 1999
1
Rev 1.100
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