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參數(shù)資料
| 型號： | 934056648118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | 75 A, 55 V, 0.008 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | PLASTIC, SMD, D2PAK-3 |
| 文件頁數(shù)： | 8/14頁 |
| 文件大小： | 251K |
| 代理商： | 934056648118 |
Philips Semiconductors
PHP112N06T; PHB112N06T
N-channel enhancement mode eld-effect transistor
Product specication
Rev. 01 — 07 March 2001
3 of 14
9397 750 08108
Philips Electronics N.V. 2001. All rights reserved.
VGS ≥ 10 V
Fig 1.
Normalized total power dissipation as a
function of mounting base temperature.
Fig 2.
Normalized continuous drain current as a
function of mounting base temperature.
Tmb =25 °C; IDM is single pulse.
Unclamped inductive load; VDD ≤ 15 V; RGS =50 ;
VGS = 5 V; starting Tj =25 °C and 150 °C.
Fig 3.
Safe operating area; continuous and peak drain
currents as a function of drain-source voltage.
Fig 4.
Non-repetitive avalanche ruggedness current
as a function of pulse duration.
03aa16
0
20
40
60
80
100
120
0
25
50
75
100
125
150
175
200
P
der
T
mb
(
o
C)
(%)
03aa24
0
20
40
60
80
100
120
0
25
50
75
100
125
150
175
200
I
der
(%)
T
mb
(
o
C)
P
der
P
tot
P
tot 25 C
°
()
----------------------
100%
×
=
I
der
I
D
I
D25 C
°
()
-------------------
100%
×
=
RDSon = VDS / ID
DC
ID
(A)
103
102
10
1
10
102
VDS (V)
tp =
1
s
tp
T
P
t
T
δ =
10
s
100
s
1 ms
10 ms
0.1 s
003aaa069
IAS
(A)
Tj prior to avalanche = 150
o
C
25 oC
tp ms
10-3
10-2
10-1
1
10
1
10
102
003aaa080
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