參數(shù)資料
型號: 935061570112
廠商: NXP SEMICONDUCTORS
元件分類: 門電路
英文描述: LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14
封裝: 3.90 MM, PLASTIC, SOT-108-1, SO-14
文件頁數(shù): 10/14頁
文件大?。?/td> 154K
代理商: 935061570112
Philips Semiconductors
Product specification
74LVU04
Hex inverter
2001 Jan 11
5
AC CHARACTERISTICS
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500
CONDITION
LIMITS
SYMBOL
PARAMETER
WAVEFORM
CONDITION
–40 to +85
°C
–40 to +125
°C
UNIT
VCC(V)
MIN
TYP1
MAX
MIN
MAX
1.2
35
Pti
d l
2.0
12
14
17
tPHL/PLH
Propagation delay
nA to nY
Figure 1
2.7
9
10
13
ns
nA to nY
3.0 to 3.6
7 2
8
10
4.5 to 5.5
7
9
NOTES:
1. Unless otherwise stated, all typical values are measured at Tamb = 25 °C
2. Typical values are measured at VCC = 3.3 V.
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V and ≤ 3.6 V
VM = 0.5 × VCC at VCC < 2.7 V and ≥ 4.5 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VM
nA INPUT
nY OUTPUT
VM
tPLH
tPHL
GND
VI
VOL
VOH
SV00395
Figure 1. Input (nA) to output (nY) propagation delays
and output transition times.
TYPICAL TRANSFER CHARACTERISTICS
SV00401
0
Vi (V)
0
0.4
0.8
1.2
I
D
V
O
VCC = 1.2 V; IO = 0 V.
100
200
300
ID
(
mA)
0
1.2
0.8
0.4
Vo
(V)
Figure 2.
相關(guān)PDF資料
PDF描述
935061580112 LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDIP14
935170150112 LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14
935170150118 LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14
935063080112 LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14
935063090112 LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDIP14
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935066270112 制造商:NXP Semiconductors 功能描述:SUB ONLY I.C.
93506EM8 制造商:undefined 功能描述:
935079-000 制造商:TE Connectivity 功能描述:55A1841-16-MST4-9CS2275 - Cable Rools/Shrink Tubing
935087-000 制造商:TE Connectivity 功能描述:301A511-51-05/164-0 - Bulk
935087N001 制造商:TE Connectivity 功能描述:301A511-51-05/164-CS7092 制造商:TE Connectivity 功能描述:301A511-51-05/164-CS7092 - Bulk