參數(shù)資料
型號(hào): 935063300112
廠商: NXP SEMICONDUCTORS
元件分類: 鎖存器
英文描述: LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封裝: 3.90 MM, PLASTIC, MS-012AB, SOT-109-1, SO-14
文件頁(yè)數(shù): 2/12頁(yè)
文件大?。?/td> 135K
代理商: 935063300112
1999 Aug 05
10
Philips Semiconductors
Product specication
16-bit D-type transparent latch with 30
series
termination resistors; 5 V input/output tolerant; 3-state
74LVC162373A;
74LVCH162373A
Fig.8 Data set-up and hold times for the nDn input to the nLE input.
The shaded areas indicate when the input is permitted to change for predictable output performance.
handbook, full pagewidth
MNA431
th
tsu
th
tsu
VM
VI
GND
VI
GND
nLE INPUT
nDn INPUT
Fig.9 3-state enable and disable times.
handbook, full pagewidth
MNA432
tPLZ
tPHZ
outputs
disabled
outputs
enabled
VY
VX
outputs
enabled
nQn OUTPUT
LOW-to-OFF
OFF-to-LOW
nQn OUTPUT
HIGH-to-OFF
OFF-to-HIGH
nOE INPUT
VI
VOL
VOH
VCC
VM
GND
tPZL
tPZH
VM
相關(guān)PDF資料
PDF描述
935170210112 LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
935063300118 LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
935171060118 LVT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
935176350118 LVT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
935176350112 LVT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
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