參數資料
型號： 935175140118
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封裝： 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP1-16
文件頁數： 11/12頁
文件大?。?/td> 135K
代理商： 935175140118
1999 Aug 05
8
Philips Semiconductors
Product specication
16-bit D-type transparent latch with 30
series
termination resistors; 5 V input/output tolerant; 3-state
74LVC162373A;
74LVCH162373A
AC CHARACTERISTICS
GND = 0 V; tr =tf ≤ 2.5 ns; Tamb = 40 to +85 °C.
Note
1. Typical values at VCC = 3.3 V and Tamb =25 °C.
SYMBOL
PARAMETER
WAVEFORMS
LIMITS
UNIT
VCC = 3.3 V ±0.3 V
VCC = 2.7 V
MIN.
TYP.(1)
MAX.
MIN.
MAX.
tPHL/tPLH
propagation delay
nDn to nQn
see Figs 6 and 10
1.5
3.3
5.4
1.5
6.4
ns
nLE to nQn
see Figs 7 and 10
1.5
3.5
5.8
1.5
6.8
ns
tPZH/tPZL
3-state output enable time
nOE to nQn
see Figs 9 and 10
1.5
4.0
7.3
1.5
8.3
ns
tPHZ/tPLZ
3-state output disable time
nOE to nQn
see Figs 9 and 10
1.5
3.4
4.8
1.5
5.8
ns
tW
nLE pulse width HIGH
see Fig.7
4.0
2.0
3
ns
tsu
set-up time nDn to nLE
see Fig.8
+2.0
0.1
1.7
ns
th
hold time nDn to nLE
see Fig.8
1.5
0.1
1.2
ns
相關PDF資料
PDF描述
935063300112 LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
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