參數(shù)資料
型號: 935175140118
廠商: NXP SEMICONDUCTORS
元件分類: 鎖存器
英文描述: LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封裝: 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP1-16
文件頁數(shù): 12/12頁
文件大小: 135K
代理商: 935175140118
1999 Aug 05
9
Philips Semiconductors
Product specication
16-bit D-type transparent latch with 30
series
termination resistors; 5 V input/output tolerant; 3-state
74LVC162373A;
74LVCH162373A
AC WAVEFORMS
Fig.6 The input (nDn) to output (nQn) propagation delay.
handbook, halfpage
MNA429
nDn INPUT
nQn OUTPUT
tPHL
tPLH
GND
VI
VM
VOH
VOL
Fig.7 Latch enable input (nLE) pulse width, the latch enable input to output (nQn) propagation delays.
handbook, full pagewidth
MNA430
nLE INPUT
nQn OUTPUT
tPHL
tPLH
tW
VM
VOH
VI
GND
VOL
VM
相關(guān)PDF資料
PDF描述
935063300112 LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
935170210112 LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
935063300118 LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
935171060118 LVT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
935176350118 LVT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
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