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參數(shù)資料
| 型號(hào)： | 935175820112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 門電路 |
| 英文描述： | LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14 |
| 封裝： | 3.90 MM, PLASTIC, SOT-108-1, MS-012, SO-14 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大小： | 132K |
| 代理商： | 935175820112 |
Philips Semiconductors
Product data
74LV03
Quad 2-input NAND gate
2003 Mar 03
6
AC CHARACTERISTICS FOR 74LV03
GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; RL = 1 k
SYMBOL
PARAMETER
WAVEFORM
CONDITION
LIMITS
–40 to +85
°C
LIMITS
–40 to +125
°C
UNIT
VCC (V)
MIN
TYP1
MAX
MIN
MAX
1.2
–
50
–
2.0
–
17
26
–
31
tPZL/tPLZ
Propagation delay
nA, nB, to nY
Figures, 1, 2
2.7
–
13
19
–
23
ns
nA, nB, to nY
3.0 to 3.6
–
102
16
–
19
4.5 to 5.5
–
–3
13
–
16
NOTE:
1
Unless otherwise stated, all typical values are at Tamb = 25 °C.
2
Typical value measured at VCC = 3.3 V.
3
Typical value measured at VCC = 5.0 V.
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V ≤ 3.6 V
VM = 0.5 V * VCC at VCC < 2.7 V and ≥ 4.5 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3 V at VCC ≥ 2.7 V and ≤ 3.6 V
VX = VOL + 0.1 * VCC at VCC < 2.7 V and ≥ 4.5 V
VI
nA, nB INPUT
GND
VCC
nY OUTPUT
VOL
VX
tPZL
tPLZ
VM
SV00358
Figure 1. Input (nA, nB) to output (nY) propagation delays.
TEST CIRCUIT
SWITCH POSITION
PULSE
GENERATOR
RT
VI
D.U.T.
VO
CL
RL = 1k
VCC
Test Circuit for Outputs
DEFINITIONS
VCC
VI
< 2.7V
VCC
TEST
tPLH/tPHL
RT = Termination resistance should be equal to ZOUT of pulse generators.
2.7V
2.7–3.6V
w 4.5V
VCC
50 pF
SV00896
S1
tPLZ/tPZL
tPHZ/tPZH
Open
2 * VCC
GND
RL = 1k
Open
2 * VCC
GND
RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance.
Figure 2. Load circuitry for switching times
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