參數(shù)資料
型號(hào): 935187130557
廠商: NXP SEMICONDUCTORS
元件分類: 畫面疊加
英文描述: PICTURE-IN-PICTURE IC, PQFP100
封裝: PLASTIC, SOT-317-2, QFP-100
文件頁(yè)數(shù): 39/43頁(yè)
文件大?。?/td> 250K
代理商: 935187130557
February 1995
5
Philips Semiconductors
Preliminary specication
Picture-in-Picture (PIP) controller for NTSC
SAB9075H
PINNING
SYMBOL
PIN
I/O
TYPE
DESCRIPTION
MPVDDA
1
I/O
E030
analog positive power supply for PLL main-channel
MPVSSA
2
I/O
E009
analog negative power supply for PLL main-channel
MHsync
3
I
E027
horizontal synchronization for main-channel
MPIbias
4
I
E027
analog bias reference current for PLL main-channel
MPVSSD
5
I/O
E009
digital negative power supply for PLL main-channel
MTCLK
6
I
HPP01
test clock for main-channel
MPVDDD
7
I/O
E030
digital positive power supply for PLL main-channel
MVDDD
8
I/O
E030
digital positive power supply for main-channel core
MVSSD
9
I/O
E009
digital negative power supply for main-channel core
DAVDDD
10
I/O
E030
digital positive power supply for DACs
DAVSSD
11
I/O
E009
digital negative power supply for DACs
n.c.
12
not connected
DAVrefTU
13
I/O
E027
analog reference voltage for top U DAC
DU
14
O
E027
analog U output
DAVrefTV
15
I/O
E027
analog reference voltage for top V DAC
DV
16
O
E027
analog V output
DAVrefTY
17
I/O
E027
analog reference voltage for top Y DAC
DY
18
O
E027
analog Y output
DAIbias
19
I
E027
analog bias reference current for DACs
DAVSSA
20
I/O
E009
analog negative power supply for DACs
DAVDDA
21
I/O
E030
analog positive power supply for DACs
I2CVDD
22
I/O
E030
positive supply for HUE and SAT decoders
MVsync
23
I
HPP01
vertical synchronization for main-channel
DBF
24
O
SPF20
fast blanking control output signal
DAI5
25
I
HPP01
data bus input from memory; bit 5
DAI4
26
I
HPP01
data bus input from memory; bit 4
SC
27
O
OPF20
memory shift clock
DAI7
28
I
HPP01
data bus input from memory; bit 7
DAI0
29
I
HPP01
data bus input from memory; bit 0
DAI6
30
I
HPP01
data bus input from memory; bit 6
DAI1
31
I
HPP01
data bus input from memory; bit 1
DT
32
O
OPF20
memory data transfer; active LOW
DAI3
33
I
HPP01
data bus input from memory; bit 3
DAO7
34
O
OPF20
data bus output to memory; bit 7
DAI2
35
I
HPP01
data bus input from memory; bit 2
DAO0
36
O
OPF20
data bus output to memory; bit 0
DAO6
37
O
OPF20
data bus output to memory; bit 6
DAO3
38
O
OPF20
data bus output to memory; bit 3
DAO1
39
O
OPF20
data bus output to memory; bit 1
DAO2
40
O
OPF20
data bus output to memory; bit 2
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